Direct contact in trench with three-mask shield gate process
First Claim
1. A method for making a shield gate trench semiconductor device, comprising:
- a) applying a trench mask as a first mask to a semiconductor substrate;
b) etching the semiconductor substrate to form trenches TR1, TR2 and TR3 with three widths W1, W2 and W3, respectively, wherein the trench TR3 is widest and deepest and the width W3 of the trench TR3 depends on a depth D2 of the trench TR2;
c) forming first conductive material at the bottom of the trenches TR1, TR2 and TR3 to form a source electrode;
d) forming a second conductive material over the first conductive material in the trenches TR1 and TR2 to form a gate electrode, wherein the first and second conductive materials are separated from each other and from the semiconductor substrate by an insulator material;
forming a dielectric layer on top of the source electrode in the trenches TR1, TR2 and TR3;
chemical mechanical polishing and/or etching back the dielectric layer to a pre-determined thickness to form the inter-poly-dielectric layer;
growing gate oxide on sidewalls of exposed portions of the trenches TR1, TR2 and TR3; and
depositing the second conductive material into the trenches TR1, TR2 and TR3 to a pre-determined thickness to fill up the trenches TR1 and TR2 but does not fill completely the trench TR3;
e) depositing a first insulator layer on top of the trenches TR1, TR2 and TR3, wherein a top portion of the trench TR3 is filled up with the insulator;
f) forming a body layer in a top portion of the substrate;
g) forming a source layer in a top portion of the body layer;
h) applying a second insulator layer on top of the trenches TR1, TR2 and TR3 and the source;
i) applying a contact mask as a second mask on top of the second insulator laver;
j) forming a source electrode contact in trench TR3, a gate electrode contact in trench TR2, and a source/body contact to the semiconductor substrate; and
k) applying a metal mask as a third mask and forming source metal and gate metal on top of the second insulator layer.
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Accused Products
Abstract
A semiconductor device and a method for making a semiconductor device are disclosed. A trench mask may be applied to a semiconductor substrate, which is etched to form trenches with three different widths. A first conductive material is formed at the bottom of the trenches. A second conductive material is formed over the first conductive material. An insulator layer separates the first and second conductive materials. A first insulator layer is deposited on top of the trenches. A body layer is formed in a top portion of the substrate. A source is formed in the body layer. A second insulator layer is applied on top of the trenches and the source. A contact mask is applied on top of the second insulator layer. Source and gate contacts are formed through the second insulator layer. Source and gate metal are formed on top of the second insulator layer.
20 Citations
33 Claims
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1. A method for making a shield gate trench semiconductor device, comprising:
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a) applying a trench mask as a first mask to a semiconductor substrate; b) etching the semiconductor substrate to form trenches TR1, TR2 and TR3 with three widths W1, W2 and W3, respectively, wherein the trench TR3 is widest and deepest and the width W3 of the trench TR3 depends on a depth D2 of the trench TR2; c) forming first conductive material at the bottom of the trenches TR1, TR2 and TR3 to form a source electrode; d) forming a second conductive material over the first conductive material in the trenches TR1 and TR2 to form a gate electrode, wherein the first and second conductive materials are separated from each other and from the semiconductor substrate by an insulator material; forming a dielectric layer on top of the source electrode in the trenches TR1, TR2 and TR3; chemical mechanical polishing and/or etching back the dielectric layer to a pre-determined thickness to form the inter-poly-dielectric layer; growing gate oxide on sidewalls of exposed portions of the trenches TR1, TR2 and TR3; and depositing the second conductive material into the trenches TR1, TR2 and TR3 to a pre-determined thickness to fill up the trenches TR1 and TR2 but does not fill completely the trench TR3; e) depositing a first insulator layer on top of the trenches TR1, TR2 and TR3, wherein a top portion of the trench TR3 is filled up with the insulator; f) forming a body layer in a top portion of the substrate; g) forming a source layer in a top portion of the body layer; h) applying a second insulator layer on top of the trenches TR1, TR2 and TR3 and the source; i) applying a contact mask as a second mask on top of the second insulator laver; j) forming a source electrode contact in trench TR3, a gate electrode contact in trench TR2, and a source/body contact to the semiconductor substrate; and k) applying a metal mask as a third mask and forming source metal and gate metal on top of the second insulator layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 29, 30)
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18. A method for making a shield gate trench semiconductor device, comprising:
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a) applying a trench mask as a first mask to a semiconductor substrate; b) etching the semiconductor substrate to form trenches TR1, TR2 and TR3 with three widths W1, W2 and W3, respectively, wherein the trench TR3 is widest and deepest and the width W3 of the trench TR3 depends on a depth D2 of the trench TR2; c) forming first conductive material at the bottom of the trenches TR1, TR2 and TR3 to form a source electrode; d) forming a second conductive material over the first conductive material in the trenches TR1 and TR2 to form a gate electrode, wherein the first and second conductive materials are separated from each other and from the semiconductor substrate by an insulator material; e) depositing a first insulator layer on top of the trenches TR1, TR2 and TR3, wherein a top portion of the trench TR3 is filled up with the insulator; f) forming a body layer in a top portion of the substrate; g) forming a source layer in a top portion of the body layer; h) applying a second insulator layer on top of the trenches TR1, TR2 and TR3 and the source; i) applying a contact mask as a second mask on top of the second insulator laver; j) forming a source electrode contact in trench TR3, a gate electrode contact in trench TR2, and a source/body contact to the semiconductor substrate; and k) applying a metal mask as a third mask and forming source metal and gate metal on top of the second insulator layer; further comprising, after e) and before f) selectively removing a portion of the first insulator layer to a level same as a top surface of the substrate. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 31, 32, 33)
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Specification