Integrated circuit device and method

• US 8,187,964 B2
• Filed: 10/19/2009
• Issued: 05/29/2012
• Est. Priority Date: 11/01/2007
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Mahler, Joachim, Behrens, Thomas, Galesic, Ivan
• Primary Examiner(s): Wagner, Jenny L
• Application Number:
  US12/581,573
• Publication Number:
  US 20100099223A1
• Time in Patent Office: 953 Days
• Field of Search: 438/612
• US Class Current: 438/612
• CPC Class Codes: H01L 23/3171 the coating being directly applied to the semiconductor body, e.g. passivation layer H01L23/3178 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An integrated circuit device includes a semiconductor chip with a metallization layer on the chip. A gas-phase deposited insulation layer is disposed on the metallization layer.

Claims

1. A method for producing an integrated circuit device, comprising:

providing a semiconductor chip;

applying a metallization layer directly to a top surface of the semiconductor chip; and

applying an insulation layer including an inorganic precursor directly on the metallization layer by a gas-phase deposition such that the insulation layer contacts the metallization layer,

wherein the insulation layer includes amorphous carbon.

2. The method of claim 1, further comprising structuring the insulation layer.

3. The method of claim 2, wherein structuring the insulation layer includes depositing a mask layer.

4. The method of claim 2, wherein structuring the insulation layer includes a photolithographic process.

5. The method of claim 2, wherein structuring the insulation layer includes laser ablation.

6. The method of claim 1, further comprising encapsulating the integrated circuit device.

7. The method of claim 1, wherein the gas-phase deposition includes a chemical vapor deposition (CVD) process.

8. The method of claim 1, wherein the gas-phase deposition includes a plasma enhanced chemical vapor deposition (PE-CVD) process.

9. The method of claim 1, further comprising applying an adhesion promoting layer over the insulation layer.

10. The method of claim 9, wherein applying the adhesion promoting layer includes a gas phase deposition of silane.

11. The method of claim 9, wherein applying an adhesion promoting layer includes a locking plasma treatment process.

12. A method for producing an integrated circuit device, comprising:

providing a semiconductor chip;

providing connection points for wire bonds through a metallization layer disposed directly on the semiconductor chip;

applying an inorganic insulation layer to the metallization layer, wherein the inorganic insulation layer has a temperature stability up to 450-500°

C.; and

forming trenches through the metallization layer to the semiconductor chip.

13. The method of claim 12, wherein the inorganic insulation layer has a thickness between 10 nm and 20 μ

m.

14. The method of claim 12, further comprising applying an adhesion-promoting layer the insulation layer by a gas phased deposition which promotes adhesion of a molding material insulation layer.

15. The method of claim 12, further comprising applying an adhesion-promoting layer to the insulation layer by a gas phased deposition which promotes adhesion of semiconductor chips.

16. A method for producing an integrated circuit device, comprising:

providing a semiconductor chip;

providing a metallization layer having a thickness greater than 10 nm disposed directly on the semiconductor chip; and

applying an insulation layer directly to the metallization layer by a gas-phase deposition such that the insulation layer contacts the metallization layer, wherein the insulation layer includes a diamond-like carbon (DLC).

17. The method of claim 16, wherein the insulation layer has a thickness of 1 μ

m.