System and method of shaping a power spectrum in PWM amplifiers

• US 8,188,804 B2
• Filed: 04/26/2010
• Issued: 05/29/2012
• Est. Priority Date: 04/01/2008
• Status: Active Grant

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Khoury, John, Beale, Richard, Alderson, Jeffrey
• Primary Examiner(s): Mis, David
• Application Number:
  US12/767,605
• Publication Number:
  US 20100207699A1
• Time in Patent Office: 764 Days
• Field of Search: 332/107, 332109-111, 327172-177, 330/10, 375/238, 381/104
• US Class Current: 332/107
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation

Abstract

In a particular embodiment, a circuit device is disclosed that includes a data generator adapted to output a random pulse sequence having a particular spectral shape. The circuit device further includes a pulse edge control circuit to selectively apply a carrier suppression operation to at least one pulse-width modulated (PWM) signal in response to the random pulse sequence to produce at least one modulated PWM output signal. The spectral energy associated with a PWM carrier of the modulated PWM output signal at a carrier frequency and associated harmonics is changed such that the modulated PWM output signal has a spectral shape defined by the particular spectral shape.

Claims

1. A circuit comprising:

an input terminal for receiving a pulse sequence having a particular spectral shape; and

a pulse edge control circuit to selectively apply a carrier suppression operation to at least one pulse-width modulated (PWM) signal in response to the pulse sequence to produce at least one adjusted PWM output signal;

wherein spectral energy of a carrier signal of the at least one adjusted PWM output signal at a carrier frequency of the carrier signal and harmonics of the carrier frequency is changed such that the at least one adjusted PWM output signal has a spectral shape defined by the particular spectral shape.

2. The circuit of claim 1, wherein the pulse sequence is received at an integer sub-multiple of a PWM frame repetition rate.

3. The circuit of claim 1, wherein the particular spectral shape includes notches at specified frequencies, and wherein the spectral shape of at least one adjusted PWM output signal includes notches at desired frequencies.

4. The circuit of claim 1, wherein the carrier suppression operation comprises a phase shift operation that is applied to selectively shift the at least one PWM input signal by plus or minus a quarter of a frame relative to a center of the frame according to the pulse sequence.

5. The circuit claim 1, wherein the carrier suppression operation comprises a chop operation that is selectively applied to chop or not chop the at least one PWM input signal with its duty cycle complement PWM signal according to the pulse sequence.

6. The circuit of claim 5, wherein the pulse edge control circuit selectively applies the chop operation by inverting the at least one PWM input signal and its duty cycle complement PWM signal and interchanging the duty cycle complement PWM signal with the at least, one PWM input signal to produce the at least one adjusted PWM output signal.

7. The circuit of claim 1 further comprising:

a sigma-delta modulator including a zero input signal, a random input noise sequence and a noise transfer function defined by a feedback loop;

wherein the pulse sequence is related to an output signal of the sigma-delta modulator.

8. The circuit of claim 7, wherein the noise transfer function is programmable to create a plurality Of spectral shapes, wherein at least one of the plurality of spectral shapes includes one or more notches at desired frequencies.

9. A circuit comprising:

a data generator including a signal input to a first circuit configured to apply a signal transfer function, a noise input to a second circuit configured to apply a noise transfer function, and an output for providing a bit sequence, the signal input configured to receive a first input signal that is substantially constant, the noise input configured to receive a second input signal;

a logic circuit to selectively apply a carrier suppression operation to at least one pulse-width modulated (PWM) signal in response to receiving the bit sequence to produce at least one adjusted PWM output signal, the at least one modulated PWM output signal having an adjusted spectral shape relative to a spectral shape of the at least one PWM signal.

10. The circuit of claim 9, wherein the second input signal comprises a random signal.

11. The circuit of claim 9, wherein the second input signal comprises a deterministic signal.

12. The circuit of claim 9, wherein the first input signal is a zero value signal.

13. The circuit of claim 9, wherein the data generator comprises a sigma-delta modulator.

14. The circuit of claim 9, wherein the first circuit and the second circuit are programmable to adjust the noise transfer function and the signal transfer function, respectively.

15. The pulse edge control circuit of claim 9, wherein the hit sequence is a random bit sequence, and wherein energy associated with a carrier signal of the at least one adjusted PWM output signal is spread in frequency.

16. The pulse edge control circuit of claim 9, wherein the at least one PWM signal comprises:

a first PWM signal; and

a second PWM signal;

wherein the carrier suppression operation comprises a phase shift operation; and

wherein the logic circuit selectively applies the phase shift operation to selectively shift the first and second PWM signals by plus or minus a portion of a frame relative to a center of the frame according to the hit sequence.

17. The pulse edge control circuit of claim 9, wherein the carrier suppression operation comprises a chop operation;

and

wherein the logic circuit selectively applies the chop operation to chop or not chop the at least one PWM signal and its duty cycle complement according to the bit sequence, wherein the chop operation includes inverting and interchanging the at least one PWM signal with the duty cycle complement.

18. The pulse edge control circuit of claim 9, wherein the bit sequence comprises a random sequence of values of either plus or minus one.

19. The pulse edge control circuit of claim 9, further comprising:

an output terminal for providing the at least one adjusted PWM output signal; and

wherein the output terminal is configurable to be coupled to at least one of a speaker driver circuit for controlling an audio application, a power control circuit for controlling a power control application, and a motor circuit for controlling a motor control application.

20. A method comprising:

receiving at least one pulse-width modulated (PWM) signal from a PWM source;

receiving a bit sequence having a particular spectral shape from a data generator; and

selectively applying a carrier suppression operation to at least one PWM signal according to the bit sequence to produce at least one modulated PWM output signal with an adjusted spectral shape relative to a spectral shape of the at least one PWM signal.

21. The method of claim 20, wherein the particular spectral shape includes notches at selected frequencies;

and

wherein the adjusted spectral shape includes notches at the selected frequencies.

22. The method of claim 20, further comprising programming the data source to produce the bit sequence having the particular spectral shape.

23. The method of claim 22, wherein the data source comprises:

a sigma-delta modulator comprising;

a signal input coupled to a first circuit configured to apply a signal transfer function, the signal input to receive a first input signal having a substantially constant value;

a noise input coupled to a second circuit configured to apply a noise transfer function, the noise input to receive a second input signal; and

an output configured to couple to a pulse edge control circuit and adapted to provide the bit sequence.