Allocating memory on a spatial light modulator

• US 8,189,015 B2
• Filed: 05/11/2006
• Issued: 05/29/2012
• Est. Priority Date: 05/20/2003
• Status: Active Grant

• Current Assignee: Syndiant Incorporated
• Original Assignee: Syndiant Incorporated
• Inventors: Guttag, Karl M.
• Primary Examiner(s): Dharia, Prabodh M
• Application Number:
  US11/382,818
• Publication Number:
  US 20060268022A1
• Time in Patent Office: 2,210 Days
• Field of Search: 345/32, 345/55, 345 84- 90, 345/204, 345/530, 345/543, 345/581, 345/596, 345/605, 345/690, 345/98, 345/507, 345/509, 345/210, 345/205, 345/691, 348/743, 348/36, 348/750, 348/771, 382/254, 382/302, 349/78
• US Class Current: 345/690
• CPC Class Codes: G06F 3/147 using display panels
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2310/0221 with use of split matrices G09G3/3644 and G09G3/3666 take precedence
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/34 by control of light from an independent source
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833
• CPC Class Codes: G09G 5/10 Intensity circuits

Abstract

The present invention provides a various methods, systems and devices for controlling light modulating elements and/or spatial light modulators. In some embodiments of the present invention, a recursive feedback method is used to control light modulating elements and/or spatial light modulators.

Claims

1. A method comprising the following steps:

(a) providing available memory on a spatial light modulator for a visual display device; and

(b) allocating said available memory for data stored in said available memory on said spatial light modulator, wherein at least some of the space allocated is based on the length of time that said data needs to stay resident in said available memory for processing on said spatial light modulator and wherein said data is processed to control mirrors/electrodes on said spatial light modulator.

2. The method of claim 1, wherein said data is a bit position array that partially specifies at least one pulse width on said mirrors/electrodes.

3. The method of claim 2, wherein different bit positions of said plurality of bit positions require different amounts of said available memory.

4. The method of claim 3, wherein the amount of said available memory required for said bit positions is based on the amount of time that a selected bit position of a selected pixel of said plurality of pixels must stay resident on said spatial light modulator.

5. The method of claim 2, wherein buffer sizes for each of said plurality of bit positions is variable.

6. The method of claim 2, wherein the number of said bit positions is a variable number.

7. The method of claim 2, wherein said bit positions comprise a two-dimensional array of bit positions.

8. The method of claim 7, wherein one dimension of said array is based on the line width of said spatial light modulator.

9. The method of claim 1, wherein step (b) employs a non-circular buffer.

10. The method of claim 1, wherein step (b) employs a circular buffer.

12. The method of claim 1, wherein said data is stored in said available memory using different types of bits and wherein the amount of space allocated for each type of bit is based on the type of bit.

13. The method of claim 1, wherein said available memory has been allocated for old data prior to step (a), and wherein step (b) comprises reallocating said previously allocated available memory for new data stored in said previously allocated available memory.

11. The method of 1, wherein said data is fetched from an external memory and sent on a backplane for said spatial light modulator in coordination with step (b).

14. A system comprising:

available memory on a spatial light modulator for a visual display device; and

means for allocating said available memory for data stored in said available memory on said spatial light modulator, wherein at least some of the space allocated is based on the length of time that said data needs to stay resident in said available memory on said spatial light modulator for processing and wherein said data is processed to control mirrors/electrodes on said spatial light modulator.

15. The system of claim 14, wherein said data is stored in said available memory using different types of bits and wherein the amount of space allocated for each type of bit is based on the type of bit.

16. The system of claim 14, wherein said system comprises a means for reallocating previously allocated available memory for new data stored in said previously allocated available memory.

17. A device comprising:

a backplane comprising an instruction memory for holding instructions for controlling at least one respective pulse width for each light modulating element of a spatial light modulator for a visual display device, wherein the at least one respective pulse width is for controlling the respective light modulating element.

18. The device of claim 17, wherein said backplane further comprises a RAM for said instruction memory.

19. The device of claim 18, wherein said instruction memory is ROM.

20. The device of claim 17, wherein said instructions are for controlling memory pointers for reading a plurality of bit positions that control each of said light modulating elements.

21. The device of claim 20, wherein said memory pointers move in a circular buffer fashion.

22. The device of claim 20, wherein changing initial contents of said memory pointers modifies the timing and/or number of pulse widths driving each of said light modulating elements.

23. The device of claim 20, wherein said backplane further comprises a pointer memory array and said memory pointers are held in said pointer memory array.

24. The device of claim 20, wherein at least some of said memory pointers point to the same bit position of said plurality of bit positions.

25. The device of claim 24, wherein said instruction memory includes said pointer memory array.

26. The device of claim 17, wherein said backplane further comprises memory pointers, wherein at least some of said memory pointers are modified by a common set of logic controlled by said instructions.

27. The device of claim 17, wherein said instruction memory holds a sequence of operations comprising said instructions, wherein said sequence of operations repeats at a periodic rate.

28. The device of claim 27, wherein said periodic rate is based on a line rate of a display process of said spatial light modulator.

29. The device of claim 17, wherein changing said instructions modifies the timing and/or number of pulse widths driving each of said light modulating elements.

30. The device of claim 17, wherein changing said instructions modifies the number of bit positions per pixel value.

31. The device of claim 17, further comprising means for reloading said instruction memory while said device continues to control said spatial light modulator.

32. The device of claim 17, wherein said holding instructions control one or more arrays of processing elements.

33. The device of claim 32, further comprising said processing elements.

34. The device of claim 17, wherein said instructions control pointers to an MRAM memory array.

35. A device comprising:

a backplane that is part of a spatial light modulator for a visual display device;

a plurality of pointers to one or more memory arrays on said backplane; and

pointer controller means for controlling said plurality of pointers to thereby control said visual display device.

36. The device of claim 35, wherein said pointer controller means is located on said backplane.

37. The device of claim 35, wherein said pointer controller means is external on said backplane.

38. The device of claim 35, wherein a portion of said pointer controller means is on said backplane and a portion of said pointer controller means is external on said backplane.

39. The device of claim 35, wherein said pointer controller means comprises a sequencing means for manipulating said pointers in sequence.

40. The device of claim 35, wherein said pointer controller means controls at least one circular buffer on said backplane.