System, apparatus and method for restricting data access

• US 8,191,125 B2
• Filed: 12/17/2004
• Issued: 05/29/2012
• Est. Priority Date: 12/19/2003
• Status: Active Grant

• Current Assignee: STMicroelectronics Limited (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Limited (STMicroelectronics NV)
• Inventors: Dellow, Andrew, Cordero, Rodrigo
• Primary Examiner(s): McNally, Michael S
• Application Number:
  US11/016,537
• Publication Number:
  US 20050235308A1
• Time in Patent Office: 2,720 Days
• Field of Search: 726/7
• US Class Current: 726/7
• CPC Class Codes: G06F 21/85 interconnection devices, e.g. bus-connected or in-line devices
• CPC Class Codes: H04N 21/4181 for conditional access
• CPC Class Codes: H04N 21/454 Content or additional data filtering, e.g. blocking advertisements
• CPC Class Codes: H04N 7/162 Authorising the user terminal, e.g. by paying; Registering the use of a subscription channel, e.g. billing

Abstract

An embodiment comprises a semiconductor integrated circuit for restricting the rate at which data may be accessed from an external memory by a device coupled to the circuit. The rate of data access is restricted if the data access satisfies one or more conditions. For example, one of the conditions is that the device which is requesting the data is insecure. Another condition is that the requested data is privileged. A data access monitor is provided to monitor data accesses and to is arranged to generate an access signal to indicate whether the conditions are satisfied or not. A bandwidth comparator determines whether data access exceeds a threshold and, if so, the semiconductor integrated circuit is impaired to prevent further data access.

Claims

1. A semiconductor integrated circuit for restricting a rate of data access from an external memory requested by one of one or more devices coupled to the semiconductor integrated circuit, comprising:

one or more processing devices configured to implement;

a data access monitor configured to determine whether a data access request is from an insecure device seeking to access a portion of the external memory storing privileged data, the external memory divided into portions storing privileged data and unprivileged data, and to generate an access signal indicating whether an insecure device is requesting access to a portion of the external memory storing privileged data; and

a bandwidth comparator configured to receive the access signal, and, if the access signal indicates that the insecure device is requesting access to a portion of the external memory storing privileged data, to determine a rate of data retrieval for the data access request, compare the rate of data retrieval with one or more thresholds, and to selectively limit the rate of data retrieval for the data access request to a selected rate based on the comparison.

2. A semiconductor integrated circuit according to claim 1 wherein the data access monitor comprises:

a first memory configured to store an indication of which devices are insecure; and

a first comparator configured to compare an identification of a device which requested the data access with the indications of which devices are insecure, and configured to generate a first condition signal to indicate whether the device requesting data is insecure.

3. A semiconductor integrated circuit according to claim 1 wherein the data access monitor further comprises:

a second memory configured to store an indication of which portions of the external memory contain privileged data; and

a second comparator configured to compare a location of a portion of retrieved data with those locations which contain privileged data, and configured to generate a second condition signal to indicate whether the retrieved data portion is privileged.

4. A semiconductor integrated circuit according to claim 3 wherein the second memory is configured to store start and end memory addresses of each portion of the external memory, and an indication of whether each portion stores privileged or unprivileged data.

5. A semiconductor integrated circuit according to claim 1 wherein the access signal comprises a stream of data portion signals, each data portion signal corresponding to a portion of data of a size being retrieved from the external memory.

6. A semiconductor integrated circuit according to claim 5 wherein each data portion signal comprises a one bit signal.

7. A semiconductor integrated circuit according to claim 5 wherein the bandwidth comparator is configured to determine the rate of data retrieval by determining a frequency at which data portion signals are received.

8. A semiconductor integrated circuit according to claim 7 wherein the bandwidth comparator comprises:

a decrement block comprising a timer, the decrement block being configured to periodically output a decrement signal at selected time intervals;

a bandwidth block having a first input that receives data portion signals from the data access monitor, and a second input that receives decrement signals from the decrement block, and comprising a bandwidth counter configured to increment in value when a signal is received at the first input, and configured to decrement when a signal is received at the second input; and

a monitoring block configured to receive a current value of the bandwidth counter, to compare the value of the bandwidth counter with one or more thresholds, and to output a threshold signal according to whether one of the thresholds has been exceeded.

9. A semiconductor integrated circuit according to claim 1 wherein the bandwidth comparator is configured to compare the rate of data retrieval with a first threshold and to cap data retrieval if the first threshold has been exceeded.

10. A semiconductor integrated circuit according to claim 9 wherein the bandwidth comparator is configured to compare the rate of data retrieval with a second threshold which is lower than the first threshold, and to cause a warning to be conveyed to a user if the second threshold has been exceeded.

11. A semiconductor integrated circuit according to claim 9 wherein the first threshold is a value corresponding to a data retrieval rate of 200 kbits/second.

12. A semiconductor integrated circuit according to claim 1 wherein the bandwidth monitor is configured to restrict the rate of data retrieval from the external memory if the device requesting the data is a processor.

13. A conditional access device for pay television, comprising:

a semiconductor integrated circuit for restricting a rate of data access from an external memory requested by one of one or more devices coupled to the semiconductor integrated circuit, the external memory including portions storing privileged data and portions storing unprivileged data, the semiconductor integrated circuit including one or more processing devices configured to implement;

a data access monitor configured to determine whether a data access from the external memory satisfies one or more conditions, the conditions including the data access being an insecure device accessing a portion of the external memory storing privileged data, and to generate an access signal according to whether the conditions are satisfied; and

a bandwidth comparator configured to receive the access signal, and, if the access signal indicates that the data access satisfies the conditions, to determine a rate of data retrieval that satisfies the conditions, compare the rate of data retrieval with one or more thresholds, and to selectively limit the rate of data retrieval for the data access request to a selected rate based on the comparison.

14. The conditional access device of claim 13 wherein the data access monitor comprises:

a first memory configured to store an indication of which devices are secure; and

a first comparator configured to compare an identification of a device which requested the data access with the indications of which devices are secure, and to generate a first condition signal to indicate whether the device requesting data is secure.

15. A method comprising:

restricting the rate of data access requested by one of one or more devices from an external memory having portions storing privileged data and portions storing unprivileged data by;

monitoring data accesses from the external memory;

determining whether a monitored data access is from an insecure device accessing a portion of the external memory storing privileged data; and

when the monitored data access is from an insecure device accessing a portion of the external memory storing privileged data;

determining a rate of data access satisfying conditions;

comparing the rate of data access with one or more thresholds;

generating a threshold signal according to whether one or more of the thresholds have been exceeded; and

limiting the rate of the data access to a selected rate if one or more of the thresholds are exceeded.

16. The method according to claim 15 wherein determining whether a monitored data access is from an insecure device accessing a portion of the external memory storing privileged data comprises the steps of:

receiving an identification of the device requesting the data; and

comparing the device identification with one or more identifiers.

17. The method according to claim 16 wherein determining whether a monitored data access is from an insecure device accessing a portion of the external memory storing privileged data further comprises the steps of:

receiving an identification of a location of data being retrieved from the external memory; and

comparing the identified location with one or more memory locations.

18. The method according to claim 15, further comprising generating an access signal including a stream of data portion signals, each data portion signal corresponding to a portion of data of a selected size being retrieved from the external memory.

19. The method according to claim 18 wherein each data portion signal comprises a one bit signal.

20. The method according to claim 18 wherein determining the rate of data access comprises determining the frequency at which data portion signals are received.

21. The method according to claim 18 wherein determining the rate of data access comprises:

causing a counter to be incremented when a data portion signal is received; and

causing the counter to be decremented at a constant rate, wherein the counter value is indicative of the rate of data access.

22. The method according to claim 21, further comprising:

determining that the counter value exceeds a first threshold; and

causing a system reset if the first threshold is exceeded.

23. The method according to claim 22, further comprising the steps of:

determining that the counter value exceeds a second threshold wherein the second threshold is lower than the first threshold; and

presenting a warning to a user if the second threshold is exceeded.

24. The method according to claim 22 wherein the first threshold is a value corresponding to a data retrieval rate of 200 kbits/second.

25. A system for controlling access to a memory having portions storing privileged data and portions storing unprivileged data, the system comprising:

means for determining whether a received data request is from a secure device;

means for determining whether the received data request is directed to privileged data stored in the memory;

means for determining whether a rate of data exceeds a first threshold; and

means for restricting access to the memory communicatively coupled to the means for determining whether a received data request is from a secure device and the means for determining whether a rate of data exceeds a first threshold and configured to selectively limit a rate of data access to a selected rate when the received data request is not from a secure device and the request is directed to privileged data stored in the memory, based on whether the rate of data exceeds the first threshold.

26. The system of claim 25, further comprising means for preventing receipt of illegitimate signals by the means for determining whether a received data request is from a secure device, the means for determining whether the received data request is directed to privileged data stored in the memory, and the means for determining whether a rate of data exceeds a first threshold and the means for restricting access to the memory.

27. The system of claim 26 wherein the means for preventing receipt of illegitimate signals comprises a monolithic integrated semiconductor circuit.

28. The system of claim 25, wherein the means for determining whether a received data request is from a secure device, the means for determining whether the received data request is directed to privileged data stored in the memory, the means for determining whether a rate of data exceeds a first threshold and the means for restricting access to the memory are integrated into a monolithic semiconductor.

29. The system of claim 25 wherein the means for determining whether a received data request is from a secure device comprises a data access monitor.

30. The system of claim 29 wherein the data access monitor comprises a first memory, a first comparator and a signal generator.

31. The system of claim 25 wherein the means for determining whether a rate of data exceeds a first threshold comprises a bandwidth comparator.

32. The system of claim 25 wherein the means for restricting access to the memory comprises a data blocking device.

33. The system of claim 25, further comprising means for decrypting encoded data.

34. A method, comprising:

controlling access to a memory having portions storing privileged data and portions storing unprivileged data by;

receiving a request from an insecure device to access privileged data stored in the memory;

selectively processing the request;

monitoring a data rate associated with the processing;

comparing the rate of data access with one or more thresholds; and

selectively limiting the data access to a selected rate based on the comparison.

35. The method of claim 34 wherein selectively processing the request comprises:

determining whether the request is from an authorized device; and

processing the request when the request is from an authorized device.

36. At least one non-transitory computer readable memory storage medium containing instructions for causing a memory controller to:

determine whether a received request to access a memory storing privileged and unprivileged data is from an insecure device seeking access to a portion of the memory storing privileged data;

when the request is from an insecure device seeking access to a portion of the memory storing privileged data, process the request by;

monitoring a data rate associated with the processing;

comparing the rate of data access with one or more thresholds; and

selectively limiting the rate of the data access to a selected rate based on the comparison.

37. The at least one non-transitory computer readable memory storage medium of claim 36 wherein the instructions cause the memory controller to determine a type of an authorized device and to control access to the memory based on the determined type.