Memory controller, memory system with memory controller, and method of controlling flash memory

• US 8,200,891 B2
• Filed: 02/08/2010
• Issued: 06/12/2012
• Est. Priority Date: 02/09/2009
• Status: Active Grant

• Current Assignee: TDK Corporation
• Original Assignee: TDK Corporation
• Inventors: Mukaida, Naoki, Kamono, Takeshi
• Primary Examiner(s): LANE, JOHN A
• Application Number:
  US12/701,789
• Publication Number:
  US 20100205356A1
• Time in Patent Office: 855 Days
• Field of Search: 711/103, 711/165, 711/203, 711/206
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7202 Allocation control and policies
• CPC Class Codes: G06F 2212/7211 Wear leveling

Abstract

In the control of the number of program-erase cycles, physical blocks (PBs) are divided into plural groups on a basis of the number of program-erase cycles and a search for a free PB is performed in the groups when assigning a logical block (LB) to the free PB. In the search, a free PB among a group covering a small number of program-erase cycles precedes that among a group covering a large number of program-erase cycles. Further, when searching out a free PB in the search, data stored in a PB (source PB) included in a group covering a smaller number of program-erase cycles than that covered by a group including the free PB searched out are transferred to the free PB if there is the source PB. The source PB is a PB to which a LB is assigned earliest among a group including it.

Claims

1. A memory controller for controlling access to one or more flash memories in which data erasing is performed in physical blocks, comprising:

a logical block management unit which forms plural logical blocks each composed of plural logical sectors to each of which a logical address for a host system is assigned;

a program-erase cycles management unit which manages a number of program-erase cycles of each physical block;

an assignment unit which assigns a logical block composed of plural logical sectors each assigned a logical address provided from a host system to a physical block;

a search unit which searches out a free physical block among each of groups into which physical blocks are divided on a basis of one or more predetermined thresholds relating to a number of program-erase cycles;

an identifying unit which identifies a physical block to which a logical block is assigned earliest among each of the groups;

a data writing unit which, in response to a request issued by the host system, identifies a logical block including a logical sector corresponding to a logical address pertaining to the request and stores data provided from the host system in a physical block corresponding to the logical block identified; and

a data transfer unit which transfers data stored in a physical block identified by the identifying unit to a free physical block searched out by the search unit;

wherein, when the assignment unit assigns a logical block to a physical block, the search unit performs a search for a free physical block so that a free physical block among a first group of the groups precedes a free physical block among a second group of the groups, which covers a larger number of program-erase cycles than that covered by the first group, in the search; and

wherein, in a case where there is at least one physical block included in a third group of the groups, which covers a smaller number of program-erase cycles than that covered by a group including a free physical block searched out in the search, the identifying unit identifies a physical block to which a logical block is assigned earliest among the third group, the data transfer unit transfers data stored in the physical block identified to the free physical block searched out, and the assignment unit assigns the logical block to the physical block identified after the data transfer unit completes data transfer.

3. A memory system comprising:

a memory controller according to claim 1; and

one or more flash memories to which access is controlled by the memory controller.

2. A memory controller for controlling access to one or more flash memories in which data erasing is performed in physical blocks, comprising:

a logical block management unit which forms plural logical blocks each composed of plural logical sectors to each of which a logical address for a host system is assigned;

a virtual block management unit which forms plural virtual blocks into which physical blocks are divided;

a program-erase cycles management unit which manages a number of program-erase cycles of each virtual block;

an assignment unit which assigns a logical block composed of plural logical sectors each assigned a logical address provided from a host system to a virtual block;

a search unit which searches out a free virtual block among each of groups into which virtual blocks are divided on a basis of one or more predetermined thresholds relating to a number of program-erase cycles;

an identifying unit which identifies a virtual block to which a logical block is assigned earliest among each of the groups;

a data writing unit which, in response to a request issued by the host system, identifies a logical block including a logical sector corresponding to a logical address pertaining to the request and stores data provided from the host system in a virtual block corresponding to the logical block identified; and

a data transfer unit which transfers data stored in a virtual block identified by the identifying unit to a free virtual block searched out by the search unit;

wherein, when the assignment unit assigns a logical block to a virtual block, the search unit performs a search for a free virtual block so that a free virtual block among a first group of the groups precedes a free virtual block among a second group of the groups, which covers a larger number of program-erase cycles than that covered by the first group, in the search; and

wherein, in a case where there is at least one virtual block included in a third group of the groups, which covers a smaller number of program-erase cycles than that covered by a group including a free virtual block searched out in the search, the identifying unit identifies a virtual block to which a logical block is assigned earliest among the third group, the data transfer unit transfers data stored in the virtual block identified to the free virtual block searched out, and the assignment unit assigns the logical block to the virtual block identified after the data transfer unit completes data transfer.

4. A memory system comprising:

a memory controller according to claim 2; and

one or more flash memories to which access is controlled by the memory controller.

5. A method for controlling access to one or more flash memories, in which data erasing is performed in physical blocks, comprising:

a logical block management step of forming plural logical blocks each composed of plural logical sectors to each of which a logical address for a host system is assigned;

a program-erase cycles management step of managing a number of program-erase cycles of each physical block;

an assignment step of assigning a logical block composed of plural logical sectors each assigned a logical address provided from a host system to a physical block;

a search step of searching out a free physical block among each of groups into which physical blocks are divided on a basis of one or more predetermined thresholds relating to a number of program-erase cycles;

an identifying step of identifying a physical block to which a logical block is assigned earliest among each of the groups;

a data writing step of, in response to a request issued by the host system, identifying a logical block including a logical sector corresponding to a logical address pertaining to the request and stores data provided from the host system in a physical block corresponding to the logical block identified; and

a data transfer step of transferring data stored in a physical block identified in the identifying step to a free physical block searched out in the search step;

wherein, when assigning a logical block to a physical block in the assignment step, performing a search for a free physical block so that a free physical block among a first group of the groups precedes a free physical block among a second group of the groups, which covers a larger number of program-erase cycles than that covered by the first group, in the search step; and

wherein, in a case where there is at least one physical block included in a third group of the groups, which covers a smaller number of program-erase cycles than that covered by a group including a free physical block searched out in the search step, identifying a physical block to which a logical block is assigned earliest among the third group in the identifying step, transferring data stored in the physical block identified to the free physical block searched out in the data transfer step, and assigning the logical block to the physical block identified, in the assignment step, after completing data transfer in the data transfer step.

6. A method for controlling access to one or more flash memories, in which data erasing is performed in physical blocks, comprising:

a logical block management step of forming plural logical blocks each composed of plural logical sectors to each of which a logical address for a host system is assigned;

a virtual block management step of forming plural virtual blocks into which physical blocks are divided;

a program-erase cycles management step of managing a number of program-erase cycles of each virtual block;

an assignment step of assigning a logical block composed of plural logical sectors each assigned a logical address provided from a host system to a virtual block;

a search step of searching out a free virtual block among each of groups into which virtual blocks are divided on a basis of one or more predetermined thresholds relating to a number of program-erase cycles;

an identifying step of identifying a virtual block to which a logical block is assigned earliest among each of the groups;

a data writing step of, in response to a request issued by the host system, identifying a logical block including a logical sector corresponding to a logical address pertaining to the request and stores data provided from the host system in a virtual block corresponding to the logical block identified; and

a data transfer step of transferring data stored in a virtual block identified in the identifying step to a free virtual block searched out in the search step;

wherein, when assigning a logical block to a virtual block in the assignment step, performing a search for a free virtual block so that a free virtual block among a first group of the groups precedes a free virtual block among a second group of the groups, which covers a larger number of program-erase cycles than that covered by the first group, in the search step; and

wherein, in a case where there is at least one virtual block included in a third group of the groups, which covers a smaller number of program-erase cycles than that covered by a group including a free virtual block searched out in the search, identifying a virtual block to which a logical block is assigned earliest among the third group in the identifying step, transferring data stored in the virtual block identified to the free virtual block searched out in the data transfer step, and assigning the logical block to the virtual block identified, in the assignment step, after completing data transfer in the data transfer step.