Generating variation-aware library data with efficient device mismatch characterization
First Claim
1. A method of generating variation-aware library data, the method comprising:
- receiving a circuit simulation model on at least one device mismatch parameter;
performing a sensitivity analysis on all device mismatch parameters, the sensitivity analysis including computing a rate of change of a timing property compared to a rate of change of a device mismatch parameter;
deriving a distribution of each timing property using the sensitivity analysis;
determining a mapping of one or more synthetic parameters to the distribution, each synthetic parameter being a random variable representing an impact on a timing parameter of all device mismatch parameters grouped to the synthetic parameter;
selecting an assignment of device mismatch parameter values; and
performing a deterministic circuit simulation using the assignment of device mismatch parameter values to generate the variation-aware library data corresponding to a 1 sigma of the synthetic parameter.
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Abstract
In a method of generating variation-aware library data for statistical static timing analysis (SSTA), a “synthetic” Gaussian variable can be used to represent all instances of one or more mismatch variations in all devices (e.g. transistors), thereby capturing the effect on at least one timing property (e.g. delay or slew). By modeling device mismatch with synthetic random variables, the variation behavior (in terms of the distribution of delay, slew, constraint, etc.) can be interpreted as the outcomes of process variations instead of modeling the variation sources (e.g. transistor shape variations, variations in dopant atom density, and irregularity of edges).
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Citations
36 Claims
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1. A method of generating variation-aware library data, the method comprising:
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receiving a circuit simulation model on at least one device mismatch parameter; performing a sensitivity analysis on all device mismatch parameters, the sensitivity analysis including computing a rate of change of a timing property compared to a rate of change of a device mismatch parameter; deriving a distribution of each timing property using the sensitivity analysis; determining a mapping of one or more synthetic parameters to the distribution, each synthetic parameter being a random variable representing an impact on a timing parameter of all device mismatch parameters grouped to the synthetic parameter; selecting an assignment of device mismatch parameter values; and performing a deterministic circuit simulation using the assignment of device mismatch parameter values to generate the variation-aware library data corresponding to a 1 sigma of the synthetic parameter. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A non-transient, computer-readable medium storing computer-executable instructions for generating variation-aware library data, which when executed by a computer performs steps of:
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receiving a circuit simulation model on at least one device mismatch parameter; performing a sensitivity analysis on all device mismatch parameters, the sensitivity analysis including computing a rate of change of a timing property compared to a rate of change of a device mismatch parameter; deriving a distribution of each timing property using the sensitivity analysis; determining a mapping of one or more synthetic parameters to the distribution, each synthetic parameter being a random variable representing an impact on a timing parameter of all device mismatch parameters grouped to the synthetic parameter; selecting an assignment of device mismatch parameter values; and performing a deterministic circuit simulation using the assignment of device mismatch parameter values to generate the variation-aware library data corresponding to a 1 sigma of the synthetic parameter. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36)
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Specification