High yield and high throughput method for the manufacture of integrated circuit devices of improved integrity, performance and reliability

• US 8,207,060 B2
• Filed: 12/18/2008
• Issued: 06/26/2012
• Est. Priority Date: 12/18/2007
• Status: Expired due to Fees

• Current Assignee: Byung Chun Yang
• Original Assignee: Byung Chun Yang
• Inventors: Yang, Byung Chun
• Primary Examiner(s): Mandala, Michelle
• Application Number:
  US12/339,033
• Publication Number:
  US 20090197404A1
• Time in Patent Office: 1,286 Days
• Field of Search: 438/633, 438/637, 438/638, 438/639, 438/FOR.355, 438/FOR.489, 438/706, 438/710, 438/745, 438/906, 257/E21.579, 257/E21.224, 257/E21.226, 257/E21.228, 257/E21.229
• US Class Current: 438/633
• CPC Class Codes: H01L 21/02063 the processing being the formation of vias or contact holes
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/76805 the opening being a via or contact hole penetrating the underlying conductor
• CPC Class Codes: H01L 21/76807 for dual damascene structures
• CPC Class Codes: H01L 21/76808 involving intermediate temporary filling with material
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76832 Multiple layers
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76846 Layer combinations
• CPC Class Codes: H01L 21/76862 Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
• CPC Class Codes: H01L 2221/1063 Sacrificial or temporary thin dielectric films in openings in a dielectric
• CPC Class Codes: Y10S 438/906 Cleaning of wafer as interim step

Abstract

The present invention provides a method of forming a contact opening, such as a via hole, in which a sacrificial layer is deposited prior to exposing a conductor formed in a substrate at a bottom side of the opening to prevent damage and contamination to the materials constituting an integrated circuit device from happening. The exposing may or may not form a recess in the conductor. The present invention also provides a method of forming a contact opening having a recess in the conductor wherein a sacrificial layer is not deposited until the conductor is exposed, but deposited before a recess is formed in the conductor so that a major damage and contamination related to the recess formation can be prevented. By forming a trench feature over a contact opening formed by using the present invention, a dual damascene feature can be fabricated. By performing further damascene process steps over the various damascene interconnect features formed by using the present invention, various interconnect systems such as a single damascene planar via, a single damascene embedded via, and various dual damascene interconnect system having either a planar via or an embedded via can be fabricated.

Claims

1. A method for fabricating an integrated circuit device, comprising:

a. forming a preliminary damascene feature having a preliminary contact opening having sidewalls formed in a dielectric layer deposited over a substrate, said substrate having a conductor of a selected thickness formed therein at least in part beneath said preliminary contact opening;

b. depositing a sacrificial layer over said preliminary damascene feature, such that said sacrificial layer covers the sidewalls of said preliminary contact opening;

c. with said sacrificial layer on said sidewalls, forming a recess in said conductor at the bottom of said preliminary contact opening; and

d. performing a residue removal process to remove at least a portion of the sacrificial layer and residue resulting from forming said-recess, thereby resulting in a final damascene feature that has a final contact opening formed in said dielectric layer, and said recess.

2. The method of claim 1, wherein said preliminary damascene feature includes a preliminary dual damascene opening having said preliminary contact opening and a preliminary trench.

3. The method of claim 1, wherein said final damascene feature provides a final dual damascene opening including said final contact opening and a final trench.

4. The method of claim 1, wherein a depth of said recess ranges from one atomic monolayer of said conductor to said selected thickness.

5. The method of claim 1, wherein a depth of said recess ranges from 5 percent to 50 percent of said selected thickness.

6. The method of claim 1, wherein said forming a recess in said conductor removes materials existing over said conductor at the bottom of said final contact opening.

7. The method of claim 1, wherein said preliminary damascene feature is formed by an etching process selected from the group consisting of (a) a plasma etch process without a stripping process and (b) a plasma etch process and a stripping process.

8. The method of claim 7, wherein said etching process continues until said conductor is exposed at the bottom of said preliminary contact opening.

9. The method of claim 7, wherein said etching process stops before said conductor is exposed at the bottom of said preliminary contact opening.

10. The method of claim 7, wherein each of said plasma etch processes uses one or more gases selected from a group consisting of He, Ar, Xe, Kr, Ne, atomic hydrogen, H₂, atomic nitrogen, N₂, nitrogen containing compound gases, CO, CO₂, atomic oxygen, O₂, O₃, H₂O and a major etchant gas group consisting of halogen gases, halogen containing compound gases that do not contain a sulfur atom, and sulfide gases.

11. The method of claim 1, wherein said dielectric layer comprises a composite of multiple dielectric layers.

12. The method of claim 11, wherein said composite of multiple dielectric layers comprises one or more interlevel dielectric (ILD) layers and one or more other dielectric layers.

13. The method of claim 12, wherein each of said one or more other dielectric layers comprises at least a layer selected from a group consisting of a capping layer, a dielectric diffusion barrier layer, a passivation layer, a chemical mechanical polishing (CMP) stop layer, and an etch stop layer.

14. The method of claim 1, wherein said sacrificial layer is a solid material layer at room temperatures.

15. The method of claim 1, wherein said sacrificial layer comprises one or more elements selected from a group consisting of silicon, oxygen, carbon, nitrogen, hydrogen, fluorine, chlorine, bromine, iodine, boron, phosphor, germanium and arsenic.

16. The method of claim 1, wherein said sacrificial layer comprises either a single material layer of constant characteristics, a material layer of gradually changing characteristics in its growth direction, or multiple material layers of varying characteristics, each of said characteristics being selected from a group consisting of crystallographic structure, microstructure, conformality, composition, and material property.

17. The method of claim 1, wherein said sacrificial layer is deposited using one or more methods selected from a group consisting of physical vapor deposition methods, chemical deposition methods, and spin-on methods.

18. The method of claim 1, wherein said sacrificial layer comprises multiple material layers of varying characteristics, each of said multiple material layers being called as a sub-layer of said sacrificial layer.

19. The method of claim 1, wherein said sacrificial layer is deposited using a chemical deposition method selected from the group consisting of plasma enhanced chemical vapor deposition methods and atomic layer deposition methods.

20. The method of claim 1, further comprising performing an additional etch back process for adjusting the conformality of said sacrificial layer prior to said forming a recess in said conductor.

21. The method of claim 1, further comprising pretreating said dielectric layer prior to said depositing a sacrificial layer using one or more dielectric layer pretreatment processes selected from a group consisting of wet clean processes, degas processes, plasma clean processes, plasma densification processes, and silylation processes.

22. The method of claim 1, wherein said forming a recess in said conductor is performed at least in part during said depositing a sacrificial layer.

23. The method of claim 1, wherein said forming a recess in said conductor is performed by using one or more plasma etch processes each of which uses one or more gases selected from a group consisting of He, Ar, Xe, Kr, Ne, atomic hydrogen, H₂, atomic nitrogen, N₂, nitrogen containing compound gases, CO, CO₂, atomic oxygen, O₂, O₃, H₂O and a major etchant gas group consisting of halogen gases, halogen containing compound gases that do not contain a sulfur atom, and sulfide gases.

24. The method of claim 1, wherein said forming a recess in said conductor is performed using a sputter etch in a plasma of one or more inert gases selected from a group consisting of He, Ar, Xe, Kr and Ne from a moment right before said materials existing over said conductor is completely etched back.

25. The method of claim 1, wherein said residue removal process is carried out by performing a wet clean process or a plasma clean process, or both.

26. The method of claim 25, wherein said wet clean process uses one or more chemicals selected from a group consisting of B₂O₃, Br₂, CH₃COOH, Ce(SO₄)₂, Ce(SO₃)₃, CrO₃, CsOH, Cu(NO₃)₂, FeSO₄, FeCl₃, Fe(NO₃)₃, H₂O, H₂O₂, H₂N₄, H₂SO₄, H₃PO₄, HNO₃, HF, H₂S, HCl, HClO₄, HI, HBr, I₂, KI, KOH, KH₂PO₄, KMnO₄, KNO₃, K₂Fe(CN)₆, K₂Cr₂O₇, K₃Fe(CN)₆, K₄Fe(CN)₆, NaOH, NaOCl, Na₂HPO₄, Na₂O, Na₂O₂, NaNO₂, NH₃, NH₄F, NH₄OH, NH₂(CH₂)NH₂, N₂H₈C₂, NHF, N₂H₄, (NH₄)₂S₂O₄, O₃, vinylacetate, dipropyleneglycolmonomethyletheracetate, ethylenediamine, ethylenedibromide, ammoniumcitrate, tetramethylammoniumhydroxide, glycerol, ethyleneglycol, oxalic acid dihydrate, anhydrous oxalic acid, citric acid, benzotriazole, propanol, pyrocatechol, polypropyleneglycol, parabenzoquinon, tartaric acid, ethanol, methanol, and isopropanol.

27. The method of claim 25, wherein said plasma clean process is performed by using one or more plasma etch processes each of which uses one or more gases selected from a group consisting of He, Ar, Xe, Kr, Ne, atomic hydrogen, H₂, atomic nitrogen, N₂, nitrogen containing compound gases, CO, CO₂, atomic oxygen, O₂, O₃, H₂O and a major etchant gas group consisting of halogen gases, halogen containing compound gases that do not contain a sulfur atom, and sulfide gases.

28. The method of claim 1, further comprising, depositing said sacrificial layer over a post etch residue remaining on the surface of said preliminary damascene feature.

29. The method of claim 1, wherein said conductor formed in said substrate comprises one or more conductor materials selected from a group consisting of pure metal materials, metal alloys, metal silicides, metal oxide, metal nitrides, metal carbide, metal borides, metal carbonitrides, and doped silicons.

30. The method of claim 1, further comprising:

a. depositing a conductive liner layer over the surface of said final damascene feature;

b. filling said final damascene feature with an upper level conductor; and

c. planarizing said upper level conductor.

31. The method of claim 30, wherein said upper level conductor comprises one or more conductor materials selected from a group consisting of pure metal materials, metal alloys, metal silicides, metal oxide, metal nitrides, metal carbide, metal borides, metal carbonitrides, and doped silicons.

32. The method of claim 30, wherein said conductive liner layer comprises a conductive diffusion barrier layer or an adhesion layer or both.

33. The method of claim 32, wherein said conductive diffusion barrier layer is deposited by a plasma enhanced chemical deposition method.

34. The method of claim 30, further comprising, performing one or more liner etch back processes prior to filling said final damascene feature with said upper level conductor such that conformality of said conductive liner layers is adjusted at least one time.

35. The method of claim 1, wherein said preliminary damascene feature is said preliminary contact opening.

36. The method of claim 1, wherein said final damascene feature is said final contact opening.