Glass core substrate for integrated circuit devices and methods of making the same

• US 8,207,453 B2
• Filed: 12/17/2009
• Issued: 06/26/2012
• Est. Priority Date: 12/17/2009
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Ma, Qing, Tran, Quan A., Sankman, Robert L., Swan, Johanna M., Rao, Valluri R.
• Primary Examiner(s): Datskovskiy, Michail V
• Application Number:
  US12/653,710
• Publication Number:
  US 20110147055A1
• Time in Patent Office: 922 Days
• Field of Search: 174252-267, 257/677, 257/686, 257/698, 257700-727, 257/734, 257/758, 257/516, 361760-768, 29825-852, 428/209, 428/210
• US Class Current: 174/262
• CPC Class Codes: H01L 21/4803 Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks H01L21/4846 takes precedence; printed circuit boards H05K1/00
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 23/15 Ceramic or glass substrates H01L23/142, H01L23/145, H01L23/147 take precedence
• CPC Class Codes: H01L 23/3675 characterised by the shape of the housing
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H05K 1/112 directly combined with via connections
• CPC Class Codes: H05K 2201/096 Vertically aligned vias, holes or stacked vias
• CPC Class Codes: H05K 2201/09827 Tapered, e.g. tapered hole, via or groove
• CPC Class Codes: H05K 2201/10287 Metal wires as connectors or conductors
• CPC Class Codes: H05K 2201/10371 Shields or metal cases
• CPC Class Codes: H05K 2201/10674 Flip chip
• CPC Class Codes: H05K 2203/0108 : Male die used for patterning, punching or transferring
• CPC Class Codes: H05K 2203/0228 : Cutting, sawing, milling or shearing
• CPC Class Codes: H05K 2203/025 : Abrading, e.g. grinding or sand blasting
• CPC Class Codes: H05K 3/0014 : Shaping of the substrate, e.g. by moulding
• CPC Class Codes: H05K 3/4605 : made from inorganic insulating material
• CPC Class Codes: H05K 3/4644 : by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: Y10T 29/49117 : Conductor or circuit manufacturing
• CPC Class Codes: Y10T 29/49126 : Assembling bases
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base

Abstract

Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.

Claims

1. A substrate comprising:

a core comprised of amorphous solid glass, the amorphous solid glass core having a first surface and an opposing second surface;

a number of conductors extending through the amorphous solid glass core beginning at the first surface and ending at the second surface, wherein the number of conductors comprise an opening through the amorphous solid glass core filled with a single conductive material;

at least one dielectric layer and at least one metal layer disposed at the first surface of the amorphous solid glass core, wherein the at least one metal layer at the first surface is electrically coupled with at least one of the conductors;

at least one dielectric layer and a least one metal layer disposed at the second surface of the amorphous solid glass core, wherein the at least one metal layer at the second surface is electrically coupled with at least one of the conductors.

2. The substrate of claim 1, wherein the amorphous solid glass core comprises a single piece of glass.

3. The substrate of claim 1, wherein the amorphous solid glass core comprises two or more sections of glass joined together.

4. The substrate of claim 1, wherein each of the conductors comprises a hole formed in the amorphous solid glass core and an electrically conductive material disposed in the hole.

5. The substrate of claim 4, further comprising a wetting layer disposed on a wall of the hole.

6. The substrate of claim 4, wherein the electrically conductive material comprises a metal.

7. The substrate of claim 4, wherein a wall of the hole is tapered at an angle relative to a centerline of the hole.

8. The substrate of claim 1, wherein each of the conductors comprises a metal wire embedded in the amorphous solid glass core.

9. The substrate of claim 1, wherein the at least one metal layer disposed at the first surface of the amorphous solid glass core is disposed directly adjacent the first surface, and wherein the at least one metal layer disposed at the second surface of the glass core is disposed directly adjacent the second surface.

10. The substrate of claim 1, further comprising:

a first set of terminals disposed on at the first side of the amorphous solid glass core, the first set of terminals to mate with a corresponding array of terminals on an integrated circuit (IC) die; and

a second set of terminals disposed at the second side of the glass core, the second set of terminals to mate with a corresponding array of terminals on a next-level component.

11. The substrate of claim 1, wherein the amorphous solid glass is selected from the group consisting of pure silica, soda-lime glass, boro-silicate glass, and alumo-silicate glass.

12. The substrate of claim 1, wherein the amorphous solid glass is selected from the group consisting of fluoride glass, phosphate glass, and chalcogen glass.

13. The substrate of claim 1, wherein the amorphous solid glass includes additives selected from the group consisting of magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, carbonates thereof, and oxides thereof.