Display device

• US 8,207,537 B2
• Filed: 07/28/2011
• Issued: 06/26/2012
• Est. Priority Date: 05/13/2002
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Murakami, Satoshi, Osame, Mitsuaki
• Primary Examiner(s): Huynh, Andy
• Application Number:
  US13/192,596
• Publication Number:
  US 20110278578A1
• Time in Patent Office: 334 Days
• Field of Search: 257/59, 257/72, 257/E21.033, 257/E21.413, 257/E21.414, 257/E29.117
• US Class Current: 257/59
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/4958 with a multiple layer structure
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 50/84 Passivation; Containers; Encapsulations
• CPC Class Codes: H10K 50/841 Self-supporting sealing arrangements
• CPC Class Codes: H10K 50/844 Encapsulations
• CPC Class Codes: H10K 50/856 comprising reflective means
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/121 characterised by the geometry or disposition of pixel elements
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/871 Self-supporting sealing arrangements
• CPC Class Codes: H10K 59/873 Encapsulations
• CPC Class Codes: H10K 59/878 comprising reflective means

Abstract

A display device according to the present invention includes a barrier layer formed over the transistor and a planarization layer formed over the barrier layer. The planarization layer has an opening and an edge portion of the planarization layer formed at the opening of the planarization layer is rounded. Further, a resin film is formed over the planarization layer and in the opening of the planarization layer, and the resin film also has an opening and an edge portion of the resin film formed at the opening of the resin film is rounded. A light emitting member is formed over the resin film.

Claims

1. A display device comprising:

a thin film transistor formed over a substrate, wherein the thin film transistor comprises a semiconductor film and a gate electrode with a gate insulating film interposed therebetween;

a barrier layer formed over the gate electrode, wherein the barrier layer is a silicon nitride film;

an insulating layer formed over the barrier layer;

an electrode formed over the insulating layer, wherein the electrode is electrically connected to the semiconductor film;

a planarization layer formed over the insulating layer, wherein the planarization layer covers a portion of the electrode;

a pixel electrode formed over the planarization layer, wherein the pixel electrode is electrically connected to the electrode;

a resin film formed over the planarization layer, wherein the resin film covers a portion of the pixel electrode; and

a light emitting member formed over the pixel electrode; and

a passivation film formed over the light emitting member, wherein the passivation film is a silicon nitride film,

wherein the planarization layer comprises a first opening,

wherein an edge portion of the planarization layer is rounded,

wherein the edge portion of the planarization layer is formed at the first opening,

wherein the pixel electrode is electrically connected to the electrode through the first opening,

wherein the resin film comprises a second opening,

wherein an edge portion of the resin film is rounded,

wherein the edge portion of the resin film is formed at the second opening,

wherein the resin film is provided in the first opening, and

wherein a bottom of the first opening and a bottom of the second opening do not overlap with each other.

2. The display device according to claim 1, wherein the insulating layer is a silicon nitride film or a silicon oxynitride film.

3. The display device according to claim 1, wherein the pixel electrode is an oxide conductive film.

4. The display device according to claim 1, wherein the planarization layer is an inorganic insulating film.

5. The display device according to claim 1, wherein the gate electrode comprises tungsten.

6. The display device according to claim 1, wherein the gate insulating film is a silicon oxynitride film.

7. The display device according to claim 1, wherein the display device is incorporated in at least one selected from the group consisting of a television, a digital camera, a personal computer, a mobile computer, an image reproducing apparatus, a goggle-type display, a video camera, and a cellular phone.

8. The display device according to claim 1, wherein the insulating layer is an inorganic insulating film.

9. A display device comprising:

a thin film transistor formed over a substrate, wherein the thin film transistor comprises a semiconductor film and a gate electrode with a gate insulating film interposed therebetween;

an insulating layer formed over the gate electrode;

a barrier layer formed over the insulating layer, wherein the barrier layer is a silicon nitride film;

an electrode formed over the barrier layer, wherein the electrode is electrically connected to the semiconductor film;

a planarization layer formed over the insulating layer, wherein the planarization layer covers a portion of the electrode;

a pixel electrode formed over the planarization layer, wherein the pixel electrode is electrically connected to the electrode;

a resin film formed over the planarization layer, wherein the resin film covers a portion of the pixel electrode;

a light emitting member formed over the pixel electrode; and

a passivation film formed over the light emitting member, wherein the passivation film is a silicon nitride film,

wherein the planarization layer comprises a first opening,

wherein an edge portion of the planarization layer is rounded,

wherein the edge portion of the planarization layer is formed at the first opening,

wherein the pixel electrode is electrically connected to the electrode through the first opening,

wherein the resin film comprises a second opening,

wherein an edge portion of the resin film is rounded,

wherein the edge portion of the resin film is formed at the second opening,

wherein the resin film is provided in the first opening, and

wherein a bottom of the first opening and a bottom of the second opening do not overlap with each other.

10. The display device according to claim 9, wherein the insulating layer is a silicon nitride film or a silicon oxynitride film.

11. The display device according to claim 9, wherein the pixel electrode is an oxide conductive film.

12. The display device according to claim 9, wherein the planarization layer is an inorganic insulating film.

13. The display device according to claim 9, wherein the gate electrode comprises tungsten.

14. The display device according to claim 9, wherein the gate insulating film is a silicon oxynitride film.

15. The display device according to claim 9, wherein the display device is incorporated in at least one selected from the group consisting of a television, a digital camera, a personal computer, a mobile computer, an image reproducing apparatus, a goggle-type display, a video camera, and a cellular phone.