Non-volatile memory control
First Claim
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1. A method of operating a memory system, comprising:
- initiating an operation for access of two or more groups of memory cells;
checking a current status of each of the two or more groups of memory cells during the operation;
determining a number of the two or more groups of memory cells that are simultaneously active during the operation;
delaying the operation if the number of the two or more groups of memory cells that are simultaneously active during the operation is at a particular value; and
continuing with the operation if the number of the two or more groups of memory cells that are simultaneously active during the operation is below the particular value.
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Abstract
Methods and apparatus for use in a memory system having a non-volatile memory and a controller for limiting the number of non-volatile memory arrays from a plurality of available arrays accessed at one time are useful in the control of concurrent access of memory arrays. One method includes implementing a pipelining sequence for transferring data to and from the non-volatile memory arrays and limiting the number of active arrays operating at one time. The controller is configured to wait for the at least one of the arrays to complete before initiating a transfer to and from a further array.
283 Citations
20 Claims
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1. A method of operating a memory system, comprising:
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initiating an operation for access of two or more groups of memory cells; checking a current status of each of the two or more groups of memory cells during the operation; determining a number of the two or more groups of memory cells that are simultaneously active during the operation; delaying the operation if the number of the two or more groups of memory cells that are simultaneously active during the operation is at a particular value; and continuing with the operation if the number of the two or more groups of memory cells that are simultaneously active during the operation is below the particular value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of operating a memory system, comprising:
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initiating a sequential access of two or more groups of memory cells; determining an electrical current level of the accessed groups of memory cells; delaying access of one of the groups of memory cells if a next access in the sequence would exceed a particular value of the electrical current level; and continuing with the sequential access when the next access in the sequence would produce an electrical current level below the particular value. - View Dependent Claims (12, 13, 14)
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15. A method of operating a memory system, comprising:
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initiating a sequential access of two or more groups of memory cells; determining a number of the two or more groups of memory cells that are simultaneously active during the sequential access; delaying access of a next group of memory cells in the sequence if the number of the two or more groups of memory cells that are simultaneously active during the sequential access is at a particular value; and accessing the next group of memory cells in the sequence when the number of the two or more groups of memory cells that are simultaneously active during the sequential access is below the particular value. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification