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Chip package and manufacturing method thereof

  • US 8,212,340 B2
  • Filed: 07/13/2009
  • Issued: 07/03/2012
  • Est. Priority Date: 07/13/2009
  • Status: Active Grant
First Claim
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1. A semiconductor package, comprising:

  • a substrate;

    a molding compound disposed adjacent to the substrate and including an upper surface, a sidewall, and a connecting section that extends from the upper surface to the sidewall, the connecting section including a first planar surface and a second planar surface that incline away from the upper surface; and

    a shielding layer disposed adjacent to the molding compound, wherein the shielding layer conformally covers the upper surface, the sidewall, and the connecting section of the molding compound, and the shielding layer is electrically connected to the substrate,wherein the first planar surface and the second planar surface define an obtuse angle in the range from 100 degrees to 160 degrees that faces inwardly toward the molding compound.

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