Printed wiring board and manufacturing method thereof

• US 8,212,365 B2
• Filed: 09/17/2010
• Issued: 07/03/2012
• Est. Priority Date: 09/25/2009
• Status: Active Grant

• Current Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Original Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Inventors: Sunohara, Masahiro, Ueda, Keisuke
• Primary Examiner(s): Wilson, Allan R
• Assistant Examiner(s): Shamsuzzaman, Mohammed
• Application Number:
  US12/884,271
• Publication Number:
  US 20110074046A1
• Time in Patent Office: 655 Days
• Field of Search: 257/686, 257/700, 257/729, 257775-778, 257/E23.062, 257/E23.063
• US Class Current: 257/778
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/81192 wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/49894 Materials of the insulating layers or coatings
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/351 : Thermal stress

Abstract

A printed wiring board is configured to be connected to an organic substrate in a state where a semiconductor chip is mounted thereon. A plurality of first layers are formed of a material having the same coefficient of thermal expansion as the semiconductor chip. A plurality of second layers are formed of a material having the same coefficient of thermal expansion as the organic substrate. The first layers have different thicknesses from each other and the second layers have different thicknesses from each other. The first layers and the second layers form a lamination by being laminated alternately one on another. The thicknesses of the first layers decrease from a side where the semiconductor chip is mounted toward a side where the organic substrate is connected. The thicknesses of the second layers decrease from the side where the organic substrate is connected toward the side where the semiconductor chip is mounted.

Claims

1. A printed wiring board configured to be connected to an organic substrate in a state where a semiconductor chip is mounted on one surface of said printed wiring board and the other surface of said printed wiring board is connected to said organic substrate, the printed wiring board comprising:

a plurality of first layers formed of a material having the same coefficient of thermal expansion as said semiconductor chip; and

a plurality of second layers formed of a material having the same coefficient of thermal expansion as said organic substrate,

wherein said first layers have different thicknesses from each other and said second layers have different thicknesses from each other;

said first layers and said second layers form a lamination by being laminated alternately one layer on another layer;

the thicknesses of said first layers decrease from a side where said semiconductor chip is mounted toward a side where said organic substrate is connected; and

the thicknesses of said second layers decrease from the side where said organic substrate is connected toward the side where said semiconductor chip is mounted.

2. The printed wiring board as claimed in claim 1, wherein the lamination of said first layers and said second layers is formed on an organic substrate core material having electrode wirings formed on both sides thereof, and the electrode wirings formed on both sides of the organic substrate core material are connected to each other by a wiring part penetrating through the organic substrate core material.

3. The printed wiring board as claimed in claim 2, wherein said organic substrate core material includes a concave portion, said electrode wirings are formed on a bottom of the concave portion, and said lamination is formed in said concave portion.

4. The printed wiring board as claimed in claim 3, further comprising:

an insulating part penetrating and extending through said lamination in a direction of a thickness of said lamination at a position corresponding to said electrode wirings of said organic substrate core material; and

an electrically conductive part penetrating and extending through said insulating part in the direction of thickness of said lamination,

wherein an end of the electrically conductive material is connected to wiring formed on a surface of said lamination via an insulating layer, and an opposite end of the electrically conductive material is connected to said electrode wirings of said organic substrate core material.

5. The printed wiring board as claimed in claim 1, wherein said first layers are formed of silicon, which also forms a substrate of said semiconductor chip, and said second layers are formed of a resin, which also forms said organic substrate core material.