Stacked NMOS DC-to-DC power conversion
First Claim
1. A method of generating a regulated voltage, comprising:
- generating the regulated voltage through controlled closing and opening of a series switch element and shunt switch element, the series switch element being connected between a first voltage supply and a common node, and the shunt switch being connected between the common node and a second supply voltage, comprising;
closing the series switch element during a first period, the series switch element comprising an NMOS series switching transistor stacked with an NMOS series protection transistor, the closing of the series switch element comprising;
applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node;
closing the shunt switch element during a second period, the shunt switch element comprising an NMOS shunt switching transistor stacked with an NMOS shunt protection transistor;
whereinclosing the series switch element during the first period further comprises applying a second switching gate voltage to the NMOS series protection transistor, andfurther comprising charging a floating capacitor during the second period, wherein the floating capacitor is coupled between the common node and a gate of the NMOS series protection transistor, and aids in control of the second switching gate voltage.
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Accused Products
Abstract
Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One method includes generating the regulated voltage though controlled closing and opening of a series switch element and shunt switch element, the series switch element being connected between a first voltage supply and a common node, and the shunt switch being connected between the common node and a second supply voltage. The series switch element includes an NMOS series switching transistor stacked with an NMOS series protection transistor, and closing the series switch element during a first period includes applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node. The shunt switch element includes an NMOS shunt switching transistor stacked with an NMOS shunt protection transistor, and the shunt switch element is closed during a second period.
43 Citations
26 Claims
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1. A method of generating a regulated voltage, comprising:
generating the regulated voltage through controlled closing and opening of a series switch element and shunt switch element, the series switch element being connected between a first voltage supply and a common node, and the shunt switch being connected between the common node and a second supply voltage, comprising; closing the series switch element during a first period, the series switch element comprising an NMOS series switching transistor stacked with an NMOS series protection transistor, the closing of the series switch element comprising; applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node; closing the shunt switch element during a second period, the shunt switch element comprising an NMOS shunt switching transistor stacked with an NMOS shunt protection transistor;
whereinclosing the series switch element during the first period further comprises applying a second switching gate voltage to the NMOS series protection transistor, and further comprising charging a floating capacitor during the second period, wherein the floating capacitor is coupled between the common node and a gate of the NMOS series protection transistor, and aids in control of the second switching gate voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A voltage regulator comprising:
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a series switch element connected between a first voltage supply and a common node, the series switch element comprising an NMOS series switching transistor stacked with an NMOS series protection transistor; a shunt switch element connected between the common node and a second voltage supply, the shunt switch element comprising an NMOS shunt switching transistor stacked with an NMOS shunt protection transistor; and means for closing the series switch element by applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node; and means for closing the shunt switch element; means for applying a second switching gate voltage to the NMOS series protection transistor; and a floating capacitor, wherein the charging capacitor is coupled between the common node and a gate of the NMOS series protection transistor, wherein the floating capacitor is charged when the shunt switch element is closed, and aids in control of the switching gate voltage. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26)
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Specification