Context switching in a network on chip by thread saving and restoring pointers to memory arrays containing valid message data

• US 8,214,845 B2
• Filed: 05/09/2008
• Issued: 07/03/2012
• Est. Priority Date: 05/09/2008
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Hoover, Russell D., Mejdrich, Eric O., Schardt, Paul E., Shearer, Robert A.
• Primary Examiner(s): To, Jennifer
• Assistant Examiner(s): Chew, Brian
• Application Number:
  US12/118,039
• Publication Number:
  US 20090282226A1
• Time in Patent Office: 1,516 Days
• Field of Search: 718/108, 711/147, 712/228, 719/312
• US Class Current: 718/108
• CPC Class Codes: G06F 15/7825 Globally asynchronous, locally synchronous, e.g. network on chip
• CPC Class Codes: H04L 49/109 Integrated on microchip, e.g. switch-on-chip

Abstract

A network on chip (‘NOC’) that includes IP blocks, routers, memory communications controllers, and network interface controllers, each IP block adapted to the network by an application messaging interconnect including an inbox and an outbox, one or more of the IP blocks including computer processors supporting a plurality of threads, the NOC also including an inbox and outbox controller configured to set pointers to the inbox and outbox, respectively, that identify valid message data for a current thread; and software running in the current thread that, upon a context switch to a new thread, is configured to: save the pointer values for the current thread, and reset the pointer values to identify valid message data for the new thread, where the inbox and outbox controller are further configured to retain the valid message data for the current thread in the boxes until context switches again to the current thread.

Claims

1. A network on chip (NOC) comprising:

integrated processor (IP) blocks, routers, memory communications controllers, and network interface controllers, each IP block adapted to a router through a memory communications controller and a network interface controller, each memory communications controller controlling communication between an IP block and memory, each network interface controller controlling inter-IP block communications through routers, each IP block further adapted to a network by a low latency, high bandwidth application messaging interconnect comprising an inbox and an outbox, one or more of the IP blocks further comprising computer processors supporting a plurality of threads of execution, the NOC further comprising;

an inbox controller configured to set pointers to identify a portion of a memory array of the inbox that contains valid message data for a current thread of execution running on a particular processor;

an outbox controller configured to set pointers to identify a portion of a memory array of the outbox that contains valid message data for the current thread of execution running on a particular processor; and

software running in the current thread of execution that, upon a context switch from the current thread of execution to a new thread of execution, is configured to;

save values corresponding to the pointers for the current thread of execution, and

reset the values corresponding to the pointers to identify valid message data for the new thread,

the inbox controller and the outbox controller further configured to retain the valid message data for the current thread in the inbox and the outbox until context switches again to the current thread.

2. The NOC of claim 1 wherein valid message data comprises message data in an inbox not yet read by its recipient and message data in an outbox not yet delivered to its recipient.

3. The NOC of claim 1 wherein the pointers further comprise a base pointer and an offset pointer, the base pointer defining a beginning of a portion of a memory array containing valid message data for the current thread, the offset pointer defining an extent of the portion of the memory array containing valid message data for the current thread, and the portion of the memory array containing valid message data for the current thread optionally also including message data retained from one or more previous context switches to another thread of execution.

4. The NOC of claim 1 wherein software running in the current thread of execution configured to reset the values corresponding to the pointers to identify valid message data for the new thread further comprises software running in the current thread of execution configured to:

set pointer values for the new thread to point to an origin of a memory array if the new thread has not run previously on the particular processor; and

restore pointer values for the new thread from memory if the new thread was run previously on the particular processor before a prior context switch.

5. The NOC of claim 1 wherein the inbox controller and the outbox controller further configured to retain the valid message data for the current thread in the inbox and the outbox until context switches again to the current thread further comprises the inbox controller and the outbox controller further configured to:

associate the valid message data for the current thread with a thread identifier of the current thread;

set a base pointer for the new thread so that, as valid message data is consumed by a recipient after the context switch, the new thread does not use storage locations in a memory array containing valid message data for the current thread; and

set an offset pointer for the new thread so that, as valid message data is deposited after the context switch, the new thread does not use storage locations in the memory array containing valid message data for the current thread.

6. The NOC of claim 1 wherein each IP block comprises a reusable unit of synchronous or asynchronous logic design used as a building block for data processing within the NOC.

7. A method of data processing on a network on chip (NOC), the NOC comprising:

integrated processor (IP) blocks, routers, memory communications controllers, and network interface controllers, each IP block adapted to a router through a memory communications controller and a network interface controller, each memory communications controller controlling communication between an IP block and memory, each network interface controller controlling inter-IP block communications through routers, each IP block further adapted to a network by a low latency, high bandwidth application messaging interconnect comprising an inbox and an outbox, one or more IP block further comprising a processor supporting a plurality of threads of execution, the NOC further comprising an inbox controller configured to set pointers to identify a portion of a memory array of the inbox that contains valid message data for a current thread of execution running on a particular processor and an outbox controller configured to set pointers to identify a portion of a memory array of the outbox that contains valid message data for the current thread of execution running on the particular processor, the method comprising;

upon a context switch from the current thread of execution to a new thread of execution;

saving, by software running in the current thread of execution, values corresponding to the pointers for the current thread of execution;

resetting, by the software running in the current thread of execution, the values corresponding to the pointers to identify valid message data for the new thread; and

retaining, by the inbox controller and the outbox controller, the valid message data for the current thread in the inbox and the outbox until context switches again to the current thread.

8. The method of claim 7 wherein valid message data comprises message data in an inbox not yet read by its recipient and message data in an outbox not yet delivered to its recipient.

9. The method of claim 7 wherein the pointers further comprise a base pointer and an offset pointer, the base pointer defining a beginning of a portion of a memory array containing valid message data for the current thread, the offset pointer defining an extent of the portion of the memory array containing valid message data for the current thread, and the portion of the memory array containing valid message data for the current thread optionally also including message data retained from one or more previous context switches to another thread of execution.

10. The method of claim 7 wherein resetting the values corresponding to the pointers to identify valid message data for the new thread further comprises:

setting pointer values for the new thread to point to the origin of the memory array if the new thread has not run previously on the particular processor; and

restoring pointer values for the new thread from memory if the new thread was run previously on the particular processor before a prior context switch.

11. The method of claim 7 wherein retaining the valid message data for the current thread in the inbox and the outbox until context switches again to the current thread further comprises:

associating the valid message data for the current thread with a thread identifier of the current thread;

setting a base pointer for the new thread so that, as valid message data is consumed by a recipient after the context switch, the new thread does not use storage locations in a memory array containing valid message data for the current thread; and

setting an offset pointer for the new thread so that, as valid message data is deposited after the context switch, the new thread does not use storage locations in the memory array containing valid message data for the current thread.

12. The method of claim 7 wherein each IP block comprises a reusable unit of synchronous or asynchronous logic design used as a building block for data processing within the NOC.

13. A computer program product for data processing on a network on chip (NOC), the NOC comprising:

integrated processor (IP) blocks, routers, memory communications controllers, and network interface controllers, each IP block adapted to a router through a memory communications controller and a network interface controller, each memory communications controller controlling communication between an IP block and memory, each network interface controller controlling inter-IP block communications through routers, each IP block further adapted to a network by a low latency, high bandwidth application messaging interconnect comprising an inbox and an outbox, one or more IP block further comprising a processor supporting a plurality of threads of execution, the NOC further comprising an inbox controller configured to set pointers to identify a portion of a memory array of the inbox that contains valid message data for a current thread of execution running on a particular processor and an outbox controller configured to set pointers to identify a portion of a memory array of the outbox that contains valid message data for the current thread of execution running on a particular processor, the computer program product disposed in a computer readable medium, wherein the computer readable medium is not a signal, the computer program product comprising computer program instructions capable of;

saving, by software running in the current thread of execution, values corresponding to the pointers for the current thread of execution;

resetting, by the software running in the current thread of execution, values corresponding to the pointers to identify valid message data for the new thread; and

retaining, by the inbox controller and the outbox controller, the valid message data for the current thread in the inbox and the outbox until context switches again to the current thread.

14. The computer program product of claim 13 wherein valid message data comprises message data in an inbox not yet read by its recipient and message data in an outbox not yet delivered to its recipient.

15. The computer program product of claim 13 wherein the pointers further comprise a base pointer and an offset pointer, the base pointer defining a beginning of a portion of a memory array containing valid message data for the current thread, the offset pointer defining an extent of the portion of the memory array containing valid message data for the current thread, and the portion of the memory array containing valid message data for the current thread optionally also including message data retained from one or more previous context switches to another thread of execution.

16. The computer program product of claim 13 wherein resetting the values corresponding to the pointers to identify valid message data for the new thread further comprises:

setting pointer values for the new thread to point to the origin of the memory array if the new thread has not run previously on the particular processor; and

restoring pointer values for the new thread from memory if the new thread was run previously on the particular processor before a prior context switch.

17. The computer program product of claim 13 wherein retaining the valid message data for the current thread in the inbox and the outbox until context switches again to the current thread further comprises:

associating the valid message data for the current thread with a thread identifier of the current thread;

setting a base pointer for the new thread so that, as valid message data is consumed by a recipient after the context switch, the new thread does not use storage locations in a memory array containing valid message data for the current thread; and

setting an offset pointer for the new thread so that, as valid message data is deposited after the context switch, the new thread does not use storage locations in the memory array containing valid message data for the current thread.

18. The computer program product of claim 13 wherein each IP block comprises a reusable unit of synchronous or asynchronous logic design used as a building block for data processing within the NOC.