Determination by circuitry of presence of authorized and/or malicious data
First Claim
1. An apparatus comprising:
- circuitry to be comprised in a host, the host including a host processor and memory, the host processor being to execute an operating system, the circuitry being to determine, independently of the operating system and the host processor, authenticity of signature list information, the circuitry being to determine the authenticity based at least in part upon authentication information received by the circuitry from a remote server, the circuitry also being to determine, independently of the operating system and the host processor, based at least in part upon comparison of at least one portion of the signature list information with at least one portion of contents of the memory, whether at least one of authorized data and malicious data is present in the at least one portion of the contents of the memory, the circuitry comprising a finite state machine, the finite state machine comprising a flip-flop to receive, during a clock transition, next state information that is to be supplied to a decoder during a succeeding clock transition as current state information, the finite state machine comprising the decoder, the next state information representing a next state of the finite state machine, the current state information representing a current state of the finite state machine.
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Accused Products
Abstract
An embodiment may include circuitry that may be comprised in a host. The host may include memory and a host processor to execute an operating system. The circuitry may be to determine, independently of the operating system and the host processor, the authenticity of signature list information, based at least in part upon authentication information received by the circuitry from a remote server. The circuitry also may be to determine, independently of the operating system and the host processor, based at least in part upon comparison of at least one portion of the signature list information with at least one portion of contents of the memory, whether authorized and/or malicious data are present in the at least one portion of the contents of the memory. Of course, many variations, modifications, and alternatives are possible without departing from this embodiment.
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Citations
20 Claims
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1. An apparatus comprising:
circuitry to be comprised in a host, the host including a host processor and memory, the host processor being to execute an operating system, the circuitry being to determine, independently of the operating system and the host processor, authenticity of signature list information, the circuitry being to determine the authenticity based at least in part upon authentication information received by the circuitry from a remote server, the circuitry also being to determine, independently of the operating system and the host processor, based at least in part upon comparison of at least one portion of the signature list information with at least one portion of contents of the memory, whether at least one of authorized data and malicious data is present in the at least one portion of the contents of the memory, the circuitry comprising a finite state machine, the finite state machine comprising a flip-flop to receive, during a clock transition, next state information that is to be supplied to a decoder during a succeeding clock transition as current state information, the finite state machine comprising the decoder, the next state information representing a next state of the finite state machine, the current state information representing a current state of the finite state machine. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method comprising:
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determining by circuitry, independently of a host processor and an operating system, authenticity of signature list information, the circuitry to be comprised in a host, the host including the host processor and memory, the host processor being to execute the operating system, the circuitry determining the authenticity based at least in part upon authentication information received by the circuitry from a remote server; and determining by the circuitry, independently of the operating system and the host processor, based at least in part upon comparison of at least one portion of the signature list information with at least one portion of contents of the memory, whether at least one of authorized data and malicious data is present in the at least one portion of the contents of the memory, the circuitry comprising a finite state machine, the finite state machine comprising a flip-flop to receive, during a clock transition, next state information that is to be supplied to a decoder during a succeeding clock transition as current state information, the finite state machine comprising the decoder, the next state information representing a next state of the finite state machine, the current state information representing a current state of the finite state machine. - View Dependent Claims (11, 12, 13, 14)
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15. Computer-readable memory storing one or more instructions that when executed by a machine result in execution of a set of operations comprising:
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determining by circuitry, independently of a host processor and an operating system, authenticity of signature list information, the circuitry to be comprised in a host, the host including the host processor and memory, the host processor being to execute the operating system, the circuitry determining the authenticity based at least in part upon authentication information received by the circuitry from a remote server; and determining by the circuitry, independently of the operating system and the host processor, based at least in part upon comparison of at least one portion of the signature list information with at least one portion of contents of the memory, whether at least one of authorized data and malicious data is present in the at least one portion of the contents of the memory, the circuitry comprising a finite state machine, the finite state machine comprising a flip-flop to receive, during a clock transition, next state information that is to be supplied to a decoder during a succeeding clock transition as current state information, the finite state machine comprising the decoder, the next state information representing a next state of the finite state machine, the current state information representing a current state of the finite state machine. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification