Verification process for non-volatile storage

• US 8,218,367 B2
• Filed: 06/07/2011
• Issued: 07/10/2012
• Est. Priority Date: 06/03/2008
• Status: Expired

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Hemink, Gerrit Jan, Lee, Shih-Chung, Miwa, Toru, Fong, Yupin, Wan, Jun, Oowada, Ken
• Primary Examiner(s): Hoang, Huan
• Application Number:
  US13/154,810
• Publication Number:
  US 20110235423A1
• Time in Patent Office: 399 Days
• Field of Search: 365/185.22, 365/185.29, 365/185.17, 365/185.18
• US Class Current: 365/185.22
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data

Abstract

When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.

Claims

1. A non-volatile storage apparatus, comprising:

a plurality of non-volatile storage elements; and

one or more managing circuits in communication with the plurality of non-volatile storage elements, the one or more managing circuits perform a particular erase function on a set of non-volatile storage elements and separately perform verification for different overlapping and contiguous subsets of the non-volatile storage elements in response to the particular erase function.

2. The non-volatile storage apparatus according to claim 1, wherein:

the one or more managing circuits separately perform verification for different overlapping contiguous subsets of the non-volatile storage elements in response to the particular erase function by applying multiple sets of testing signals, at different times, to the overlapping and contiguous subsets of non-volatile storage devices and, at the different times and in response to the testing signals, sensing condition information of non-volatile storage elements receiving the testing signals.

3. The non-volatile storage apparatus according to claim 2, wherein:

the testing signals are at a common voltage.

4. The non-volatile storage apparatus according to claim 2, wherein:

the one or more managing circuits apply overdrive signals, while applying the testing signals, to non-volatile storage elements not in respective subsets.

5. The non-volatile storage apparatus according to claim 1, wherein:

the particular erase function is an erase pulse; and

the one or more managing circuits separately perform verification for different overlapping and contiguous subsets of the non-volatile storage elements in response to the particular erase function by verifying twice for a particular erase pulse those non-volatile storage elements in multiple subsets.

6. The non-volatile storage apparatus according to claim 1, wherein:

the one or more managing circuits separately perform verification for different overlapping and contiguous subsets of the non-volatile storage elements in response to the particular erase function by applying one or more testing signals to a first subset of non-volatile storage elements, sensing condition information for the first subset of non-volatile storage elements, applying one or more testing signals to a second subset of non-volatile storage elements that overlaps with the first subset of non-volatile storage elements and sensing condition information for the second subset of connected non-volatile storage elements.

7. The non-volatile storage apparatus according to claim 6, further comprising:

word lines connected to the non-volatile storage elements, the non-volatile storage elements are NAND flash memory devices arranged on NAND strings, the first subset and the second subset include portions of common NAND strings, and the testing signals are applied to word lines connected to the NAND strings.

8. The non-volatile storage apparatus according to claim 1, wherein:

the non-volatile storage elements are NAND flash memory devices arranged on a NAND string.

9. The non-volatile storage apparatus according to claim 1, wherein:

the one or more managing circuits separately perform verification for different overlapping and contiguous subsets of the non-volatile storage elements in response to the particular erase function by sequentially verifying all overlapping and contiguous subsets of the non-volatile storage elements after and in response to the particular erase function.

10. The non-volatile storage apparatus according to claim 1, wherein:

the one or more managing circuits perform multiple erase operations on the set of non-volatile storage elements and perform verification on less than all of the subsets of non-volatile storage elements after each of the erase operations, the performing multiple erase operations and the performing verification on less than all of the subsets of non-volatile storage elements after each of the erase functions are performed prior to the particular erase function.

11. A non-volatile storage apparatus, comprising:

a plurality of non-volatile storage elements; and

one or more managing circuits in communication with the plurality of non-volatile storage elements;

the one or more managing circuits apply one or more testing signals to a first contiguous and connected group of non-volatile storage elements, sense condition information for the first contiguous and connected group of non-volatile storage elements in response to the one or more testing signals applied to the first contiguous and connected group of non-volatile storage elements, apply one or more testing signals to a second contiguous and connected group of non-volatile storage elements that overlaps with the first contiguous and connected group of non-volatile storage elements, and sense condition information for the second contiguous and connected group of connected non-volatile storage elements in response to the one or more testing signals applied to the second contiguous and connected group of non-volatile storage elements.

12. The non-volatile storage apparatus according to claim 11, wherein:

the first contiguous and connected group of non-volatile storage elements and the second contiguous and connected group of non-volatile storage elements are NAND flash memory devices arranged on NAND strings;

the non-volatile storage apparatus further comprises word lines connected to the NAND strings;

the testing signals and the overdrive signals are applied to word lines connected to the NAND strings;

a particular non-volatile storage element is in the first contiguous and connected group of non-volatile storage elements and the second contiguous and connected group of non-volatile storage elements;

the one or more managing circuits sense the particular non-volatile storage element when sensing the condition information for the first contiguous and connected group of non-volatile storage elements and when sensing condition information for the second contiguous and connected group of non-volatile storage; and

the one or more managing circuits apply an erase signal to the first contiguous and connected group of non-volatile storage elements and the second contiguous and connected group of non-volatile storage elements, the sensing condition information for the first contiguous and connected group of non-volatile storage elements and the sensing condition information for the second contiguous and connected group of connected non-volatile storage elements are performed separately to test whether the erase signal achieved a successful erase condition in the first contiguous and connected group of non-volatile storage elements and the second contiguous and connected group of non-volatile storage elements.

13. A non-volatile storage apparatus, comprising:

a plurality of non-volatile storage elements; and

one or more managing circuits in communication with the plurality of non-volatile storage elements, the one or more managing circuits apply multiple sets of testing signals at different times to overlapping and contiguous subsets of non-volatile storage devices, the one or more managing circuits sense condition information of non-volatile storage elements receiving the testing signals, the one or more managing circuits perform the sensing at the different times and in response to the testing signals.

14. The non-volatile storage apparatus according to claim 13, wherein:

the one or more managing circuits perform an erase function on the plurality of non-volatile storage elements; and

the sensing is performed in order to verify the erase function.

15. The non-volatile storage apparatus according to claim 13, wherein:

the one or more managing circuits apply a set of erase signals to the non-volatile storage elements; and

the one or more managing circuits apply the multiple sets of testing signals after each erase signal.

16. The non-volatile storage apparatus according to claim 13, wherein:

the one or more managing circuits apply a first set of erase signals and a second set of erase signals to the non-volatile storage elements;

the one or more managing circuits attempt to verify less then all subsets of the overlapping and contiguous subsets of non-volatile storage devices after each erase signal of the first set of erase signals; and

the one or more managing circuits apply the multiple sets of testing signals at different times to overlapping and contiguous subsets of non-volatile storage devices after each erase signal of the second set of erase signals.

17. The non-volatile storage apparatus according to claim 13, further comprising:

word lines, the non-volatile storage elements are NAND flash memory devices arranged on NAND strings, the word lines are connected to the NAND strings, the one or more managing circuits apply the testing signals to subsets of the word lines.

18. The non-volatile storage apparatus according to claim 13, wherein:

a first non-volatile storage element is in a first subset of the subsets and in a second subset of the subsets; and

the one or more managing circuits sense conditions information for the first non-volatile storage element when sensing for the first subset and separately when sensing for the second subset.

19. The non-volatile storage apparatus according to claim 13, wherein:

the testing signals are at a common voltage.

20. The non-volatile storage apparatus according to claim 13, wherein:

the one or more managing circuits apply overdrive signals to non-volatile storage elements not receiving the testing signals, the one or more managing circuits apply the overdrive signals when applying the testing signals.

21. The non-volatile storage apparatus according to claim 20, wherein:

the one or more managing circuits sense the condition information of non-volatile storage elements receiving the testing signals as part of an erase verify operation; and

overdrive signals are also used by the one or more managing circuits during read operations.

22. A non-volatile storage apparatus, comprising:

a plurality of non-volatile storage elements; and

one or more managing circuits in communication with the plurality of non-volatile storage elements, the one or more managing circuits perform an erase function on the plurality of non-volatile storage elements, the one or more managing circuits separately apply testing signals to different subsets of non-volatile storage devices including applying a different testing signal to a non-volatile storage element at an edge of a particular subset as compared to non-volatile storage elements not at edges of the particular subset, the one or more managing circuits apply overdrive signals to non-volatile storage elements not in a subset being sensed while applying the testing signals, the overdrive signals are different than the testing signals, the different subsets of the non-volatile storage elements include contiguous and connected non-volatile storage elements, the one or more managing circuits sense condition information for the different subsets in response to the testing signals, the sensing condition information is an attempt to verify the erase function.

23. The non-volatile storage apparatus according to claim 22, wherein:

the different subsets of the non-volatile storage elements include non-volatile storage elements arranged in NAND strings.

24. The non-volatile storage apparatus according to claim 22, wherein:

the applying a different testing signal to a non-volatile storage element at an edge of a particular subset as compared to non-volatile storage elements not at edges of the particular subset includes applying a higher voltage to non-volatile storage elements not at edges of the particular subset and applying a lower voltage to the non-volatile storage element at the edge of the particular subset.

25. The non-volatile storage apparatus according to claim 22, wherein:

the one or more managing circuits perform the erase function and the sensing repeatedly until one or more subsets are successfully verified.

26. The non-volatile storage apparatus according to claim 22, wherein:

the one or more managing circuits perform multiple iterations of the erase function to the plurality of non-volatile storage elements and perform verification operations on one subset of the set of non-volatile storage elements prior to the one or more managing circuits separately applying testing signals to different subsets of non-volatile storage devices.