Method for fabricating robust light-emitting diodes

• US 8,222,063 B2
• Filed: 03/26/2008
• Issued: 07/17/2012
• Est. Priority Date: 03/26/2008
• Status: Expired due to Fees

• Current Assignee: Lattice Power
• Original Assignee: Lattice Power
• Inventors: Wang, Li, Jiang, Fengyi
• Primary Examiner(s): Tran, Tony
• Application Number:
  US12/160,044
• Publication Number:
  US 20110049540A1
• Time in Patent Office: 1,574 Days
• Field of Search: 257/94, 257/55, 257/57, 257/92, 257/E33.028, 257/E21.085, 438/38, 438/30, 438/48, 438/128
• US Class Current: 438/38
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

One embodiment of the present invention provides a method for fabricating light-emitting diodes (LEDs). The method includes fabricating an InGaAlN-based multilayer LED structure on a conductive substrate. The method further includes etching grooves of a predetermined pattern through the active region of the multilayer LED structure. The grooves separate a light-emitting region from non-light-emitting regions. In addition, the method includes depositing electrode material on the light-emitting and non-light-emitting regions, thereby creating an electrode. Furthermore, the method includes depositing a passivation layer covering the light-emitting and non-light-emitting regions. Moreover, the method includes removing the passivation layer on the electrode to allow the non-light-emitting regions which are covered with the electrode material and the passivation layer to be higher than the light-emitting region and the electrode, thereby protecting the light-emitting region from contact with test equipment.

Claims

1. A method for fabricating a light-emitting diode (LED), the method comprising:

fabricating an InGaAlN-based multilayer LED structure on a conductive substrate, which involves;

forming a growth substrate;

depositing the InGaAlN-based multilayer LED structure on the growth substrate;

depositing a metal bonding layer on the InGaAlN-based multilayer LED structure;

preparing a metal bonding layer on the conductive substrate;

bonding the InGaAlN-based multilayer LED structure with the conductive substrate; and

removing the growth substrate;

thereafter

etching grooves of a predetermined pattern through an active region of the InGaAlN-based multilayer LED structure on the conductive substrate, thereby resulting in mesas on the conductive substrate, wherein the grooves separate a light-emitting region from non-light-emitting regions;

depositing electrode material on the light-emitting and non-light-emitting regions, thereby creating an electrode;

depositing a passivation layer covering the light-emitting and non-light-emitting regions; and

removing the passivation layer on the electrode to allow the non-light-emitting regions which are covered with the electrode material and the passivation layer to be higher than the light-emitting region and the electrode, thereby protecting the light-emitting region from contact with test equipment.

2. The method of claim 1, the predetermined pattern is a pattern of grooves etched on two opposite corners of the LED structure.

3. The method of claim 1, wherein the predetermined pattern is a rectangular or circular pattern of grooves etched on the LED structure, wherein the light-emitting region is enclosed in the pattern of grooves.

4. The method of claim 1, wherein the electrode comprises gold-germanium-nickel alloy.

5. The method of claim 1, wherein the passivation layer comprises silicon dioxide.

6. The method of claim 1, wherein removing the passivation layer on the electrode comprises applying photolithography.

7. The method of claim 1, wherein the non-light-emitting regions which are covered with the electrode material and the passivation layer are higher than the light-emitting region and the electrode by approximately 0.1 to 2 micrometers.

8. The method of claim 7, wherein the non-light-emitting regions which are covered with the electrode material and the passivation layer are higher than the light-emitting region and the electrode by approximately 0.5 micrometer.