Systems and methods for adjusting threshold voltage

• US 8,222,914 B2
• Filed: 08/25/2009
• Issued: 07/17/2012
• Est. Priority Date: 02/02/2004
• Status: Expired due to Fees

• Current Assignee: Meta Platforms, Inc. (f/k/a Facebook, Inc.)
• Original Assignee: Intellectual Ventures Funding LLC (Intellectual Ventures LLC)
• Inventors: Masleid, Robert Paul, Burr, James B.
• Primary Examiner(s): TANG, MINH NHUT
• Application Number:
  US12/547,392
• Publication Number:
  US 20090322412A1
• Time in Patent Office: 1,057 Days
• Field of Search: None
• US Class Current: 324/762.09
• CPC Class Codes: G01R 31/2621 for testing field effect transistors, i.e. FET's
• CPC Class Codes: H03K 19/0027 in field effect transistor circuits
• CPC Class Codes: H03K 2217/0018 Special modifications or use of the back gate voltage of a FET

Abstract

Systems and methods for adjusting threshold voltage. A threshold voltage of a transistor of an integrated circuit is measured. A bias voltage, which when applied to a body well of the transistor corrects a difference between the threshold voltage and a desired threshold voltage for the transistor, is determined. The bias voltage is encoded into non-volatile storage on the integrated circuit. The non-volatile storage can be digital and/or analog.

Claims

1. A method comprising:

accessing a bias voltage representation from non-volatile storage of an integrated circuit;

generating a bias voltage corresponding to said bias voltage representation; and

applying said bias voltage to a body biasing well of said integrated circuit.

2. The method of claim 1 wherein said generating is performed on said integrated circuit.

3. The method of claim 1 wherein said accessing is performed substantially by hardware.

4. The method of claim 1 wherein said accessing is performed under software control.

5. The method of claim 1 wherein said bias voltage representation is analog.

6. The method of claim 1 wherein said bias voltage representation is digital.

7. The method of claim 6 wherein said applying comprises coupling said bias voltage from a source external to said integrated circuit.

8. A method comprising:

accessing a voltage representation from non-volatile storage of an integrated circuit;

generating a voltage corresponding to said voltage representation; and

applying said voltage to a body well of said integrated circuit to achieve a desired threshold voltage.

9. The method of claim 8 wherein said voltage representation comprises a digital representation of said voltage.