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Semiconductor device having memory array, method of writing, and systems associated therewith

  • US 8,223,527 B2
  • Filed: 11/07/2008
  • Issued: 07/17/2012
  • Est. Priority Date: 11/09/2007
  • Status: Active Grant
First Claim
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1. A semiconductor device, comprising:

  • a non-volatile memory cell array;

    a control unit configured to generate a mode signal indicating if a flash mode has been enabled;

    a write circuit configured to write in the non-volatile memory cell array based on the mode signal such that the write circuit disables erasing the non-volatile memory cell array if the flash mode has not been enabled and instructions to erase one or more cells of the non-volatile memory cell array is received; and

    a read circuit configured to read data from the non-volatile memory cell array; and

    whereinthe control unit is configured to control the read circuit to read data associated with an address input for a write operation during a pre-read operation; and

    the write circuit is configured to disable writing data in memory locations of the non-volatile memory cell array storing data matching the write data during the pre-read operation based on the read data.

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