Method and structure of monolithetically integrated inertial sensor using IC foundry-compatible processes
First Claim
1. A method for fabricating a monolithic integrated CMOS and MEMS device,the method comprising:
- providing a first semiconductor substrate having a first surface region;
forming one or more CMOS integrated circuit device provided on a CMOS integrated circuit device region overlying the first surface region, the CMOS integrated circuit device region having a CMOS surface region;
forming a dielectric layer overlying the CMOS surface region;
joining a second semiconductor substrate having a second surface region to the CMOs surface region by bonding the second surface region to the dielectric layer;
thinning the second semiconductor substrate to a desired thickness while maintaining attachment to the dielectric layer;
forming one or more via structures within one or more portions of the desired thickness of the second semiconductor substrate;
forming a conformal coating of metal material within the one or more via structures; and
forming one or more free standing MEMS structures within one or more portions of the desired thickness of the second semiconductor substrate, the one or more MEMS structures being configured to be supported by one or more members integrally formed on the desired thickness of the second semiconductor substrate.
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Abstract
The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.
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Citations
33 Claims
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1. A method for fabricating a monolithic integrated CMOS and MEMS device,
the method comprising: -
providing a first semiconductor substrate having a first surface region; forming one or more CMOS integrated circuit device provided on a CMOS integrated circuit device region overlying the first surface region, the CMOS integrated circuit device region having a CMOS surface region; forming a dielectric layer overlying the CMOS surface region; joining a second semiconductor substrate having a second surface region to the CMOs surface region by bonding the second surface region to the dielectric layer; thinning the second semiconductor substrate to a desired thickness while maintaining attachment to the dielectric layer; forming one or more via structures within one or more portions of the desired thickness of the second semiconductor substrate; forming a conformal coating of metal material within the one or more via structures; and forming one or more free standing MEMS structures within one or more portions of the desired thickness of the second semiconductor substrate, the one or more MEMS structures being configured to be supported by one or more members integrally formed on the desired thickness of the second semiconductor substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A method of forming a monolithic MEMS and CMOS integrated circuit device, the method comprising:
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providing a first semiconductor substrate having a first surface region; forming one or more CMOS integrated circuit device provided on a CMOS integrated circuit device overlying the first surface region, the CMOS integrated circuit device region having a CMOS surface region; forming a dielectric layer overlying the CMOS surface region; joining a second semiconductor substrate having a second surface region to the CMOs surface region by bonding the second surface region to the dielectric layer, the second semiconductor substrate comprising a bulk substrate, an overlying insulating layer, and a single crystal device layer, the single crystal device layer comprising the second surface region; thinning the bulk substrate of the second semiconductor layer to a desired thickness including the single crystal device, the insulating layer, and a portion of the bulk substrate while maintaining attachment to the dielectric layer; and forming one or more MEMS structures within one or more portions of the desired thickness of the second semiconductor substrate, the one or more MEMS structures being configured to be supported by one or more members integrally formed on the desired thickness of the second semiconductor substrate.
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20. A method for fabricating a monolithic integrated CMOS and MEMS device, the method comprising:
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providing a semiconductor substrate having a first surface region; forming one or more CMOs integrated circuit device provided on a CMOS integrated circuit device region overlying the first surface region, the CMOS integrated circuit device region having a CMOS surface region; forming a dielectric layer overlying the CMOS surface region; forming a semiconductor material having a second surface region overlying the CMOS surface region; forming one or more via structures within one or more portions of the semiconductor material; forming a conformal coating of metal material within the one or more via structures; and forming one or more free standing MEMS structures within one or more portions of the semiconductor material, the one or more MEMS structures being configured to be supported by one or more members integrally formed with one or more portions of the semiconductor material. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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Specification