Single crystal silicon sensor with additional layer and method of producing the same

• US 8,227,286 B2
• Filed: 01/06/2011
• Issued: 07/24/2012
• Est. Priority Date: 03/02/2004
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Nunan, Thomas Kieran, Brosnihan, Timothy J.
• Primary Examiner(s): Smith, Bradley K
• Application Number:
  US12/985,700
• Publication Number:
  US 20110095384A1
• Time in Patent Office: 565 Days
• Field of Search: 438/48, 438/50
• US Class Current: 438/50
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up

Abstract

A SOI-based MEMS device has a base layer, a device layer, and an insulator layer between the base layer and the device layer. The device also has a deposited layer having a portion that is spaced from the device layer. The device layer is between the insulator layer and the deposited layer.

Claims

1. A method of forming an SOI-based MEMS device, the method comprising:

providing a SOI-based MEMS wafer having a single crystal silicon layer with a top face, the single crystal silicon layer also having sensing structure and a second component, the second component being within the single crystal silicon layer and including circuitry;

depositing a sacrificial layer on the top face; and

depositing an additional MEMS layer on the sacrificial layer, the additional MEMS layer having a surface that faces the top face and the sensing structure, the deposited additional MEMS layer electrically connecting the sensing structure with the circuitry and forming an electrode capable of capacitively coupling with at least a portion of the single crystal silicon layer and measuring a change of capacitance between the sensing structure and the additional MEMS layer, the change in capacitance being based, at least in part, upon a change in distance between the sensing structure and the surface of the deposited additional MEMS layer.

2. The method as defined by claim 1 wherein the additional MEMS layer is comprised of a material having a deposition temperature that is less than about 45°

C.

3. The method as defined by claim 1 further comprising removing at least a portion of the sacrificial layer.

4. The method as defined by claim 1 wherein the additional MEMS layer forms a cap for at least a portion of the top face of the SOI-based MEMS wafer.

5. The method as defined by claim 1 further comprising applying surface micromachining processes to the additional MEMS layer.

6. The method as defined by claim 1, wherein the additional MEMS layer forms an electrostatic actuator for actuating a movable structure within the MEMS device.

7. The method as defined by claim 1, wherein the additional MEMS layer has a portion that is spaced from the top face of the SOI-based MEMS wafer.

8. The method as defined by claim 1, wherein the additional MEMS layer forms an air space between the additional MEMS layer and the top face of the SOI-based MEMS wafer.

9. The method as defined by claim 1, wherein the deposited additional MEMS layer has a portion that is spaced from the top surface, the deposited additional MEMS layer being conductive to serve as an interconnect for the sensing structure on the single crystal silicon layer.

10. A method of forming a MEMS inertial sensor, the method comprising:

providing a single crystal wafer having a top face, the single crystal wafer also having sensing structure and a second component, the second component being within the single crystal wafer and including circuitry;

depositing a sacrificial layer on the top face; and

depositing an additional MEMS layer on the sacrificial layer, the additional MEMS layer having a surface that faces the top face and the sensing structure, the deposited additional MEMS layer electrically connecting the sensing structure with the circuitry and forming an electrode capable of capacitively coupling with at least a portion of the single crystal wafer and measuring a change of capacitance between the sensing structure and the additional MEMS layer, the change in capacitance being based, at least in part, upon a change in distance between the sensing structure and the surface of the additional MEMS layer.

11. The method as defined by claim 10 further comprising removing at least a portion of the sacrificial layer.

12. The method as defined by claim 10 further comprising applying surface micromachining processes to the additional MEMS layer.

13. The method as defined by claim 10, wherein the additional MEMS layer forms an electrostatic actuator for actuating a movable structure within the MEMS inertial sensor.

14. The method as defined by claim 10, wherein the additional MEMS layer has a portion that is spaced from the top face of the single crystal wafer.

15. The method as defined by claim 10, wherein the additional MEMS layer forms an air space between the additional MEMS layer and the top face of the single crystal wafer.

16. The method as defined by claim 10, wherein the deposited additional MEMS layer has a portion that is spaced from the top surface, the deposited additional MEMS layer being conductive to serve as an interconnect for the sensing structure on the single crystal wafer.