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Sequence and timing control of writing and rewriting pixel memories with substantially lower data rate

  • US 8,228,595 B2
  • Filed: 11/06/2009
  • Issued: 07/24/2012
  • Est. Priority Date: 11/01/2003
  • Status: Active Grant
First Claim
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1. An image display system implemented with a spatial light modulator (SLM) having a plurality of pixel elements to receive and apply image data of multiple bits to display image according to the image data, the image display system further comprising:

  • a controller to control a process of writing the image data into each of the pixel elements by dividing the image data of multiple bits into groups and writing each group of bits into the pixel element in a non-sequential order of significance of bit, neither in a order of from a most significant bit (MSB) to a least significant bit (LSB) nor from the LSB to the MSB, and without a writing conflict in writing said memory data into two pixel elements simultaneously during the process of writing.

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