System and method for communicating data using efficient fast fourier transform (FFT) for orthogonal frequency division multiplexing (OFDM) modulation

• US 8,229,009 B2
• Filed: 04/01/2008
• Issued: 07/24/2012
• Est. Priority Date: 04/01/2008
• Status: Active Grant

• Current Assignee: Smartsky Networks Llc
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Moffatt, Christopher D., Mattsson, Anders, Pajunen, John W.
• Primary Examiner(s): PATEL, DHAVAL V
• Application Number:
  US12/060,283
• Publication Number:
  US 20090245406A1
• Time in Patent Office: 1,575 Days
• Field of Search: 375/260, 375/261, 375/267, 375/132, 375/219, 375/295, 375/296, 375/297, 370/203, 370/204, 370/205, 370/208, 370/209, 370/210, 370/344, 370/328, 370/335
• US Class Current: 375/260
• CPC Class Codes: G06F 17/142 Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
• CPC Class Codes: H04L 27/2628 Inverse Fourier transform modulators, e.g. inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators H04L27/2634 takes precedence
• CPC Class Codes: H04L 27/265 Fourier transform demodulators, e.g. fast Fourier transform [FFT] or discrete Fourier transform [DFT] demodulators H04L27/26524 takes precedence

Abstract

A communications device includes at least one memory device for storing complex exponential functions as approximations of sine and cosine basis waveforms. A logic circuit adds and subtracts the complex exponential functions to generate an Orthogonal Frequency Division Multiplexed (OFDM) communications signal as a plurality of N data subcarriers that carry communications data. The logic circuit provides efficient and accurate implementation of the IFFT for use as an OFDM modulator using additions of stored complex exponentials and modulation of the integer-valued QAM data symbols using logic shifts and sign changes (2'"'"'s complement).

Claims

1. A communications device comprising:

at least one memory element for storing complex exponential functions as frequency approximations of sine and cosine basis waveforms; and

a logic circuit for adding and subtracting the complex exponential functions to generate an orthogonal frequency division multiplexed (OFDM) communications signal as a plurality of N data subcarriers that carry communications data wherein said logic circuit is operative for logically shifting and adding cosine (nkω

/N) and sine (nkω

/N) corresponding to the input digital constellation symbols.

2. The communications device according to claim 1, wherein said logic circuit comprises a shift register circuit for multiplying by +/−

2^p and adding and subtracting the complex exponential functions according to the input digital constellation symbol values.

3. The communications device according to claim 2, wherein said logic circuit further comprises a summer operative with said shift register circuit for summing shifted values of the complex exponential functions.

4. The communications device according to claim 1, wherein said logic circuit is operative for modulating N data subcarriers, where N is not restricted to powers of 2.

5. The communications device according to claim 1, wherein said logic circuit is operative for modulating data subcarriers using quadrature amplitude modulation (QAM).

6. The communications device according to claim 5, wherein said QAM also comprises quadrature phase shift keying (QPSK) or binary phase shift keying (BPSK) modulation.

7. The communications device according to claim 1, wherein said logic circuit comprises a field programmable gate array (FPGA) or digital signal processor (DSP) for performing logical shifts, sign changes, and additions.

8. The communications device according to claim 1, wherein said logic circuit is operative for adding and subtracting as multiplies of type +/−

2^p.

9. The communications device according to claim 1, wherein said at least one memory element comprises a plurality of memory elements, each corresponding to a different frequency.

10. The communications device according to claim 9, wherein number of said memory elements are reduced using modulo counters to generate higher frequency complex exponentials using the lowest frequency complex exponential.

11. A system for communicating, comprising:

an encoder for encoding a signal with a forward error correction code; and

a modulator configured to approximate the frequencies of sine and cosine basis waveforms using complex exponential functions and at least one memory element configured to store the complex exponential functions and a logic circuit configured to add and subtract the stored complex exponential functions corresponding to digital constellation symbols to generate an orthogonal frequency division multiplexed (OFDM) communications signal as a plurality of N data subcarriers that carry communications data wherein said logic circuit is operative for logically shifting and adding cosine (nkω

/N) and sine (nkw/N) corresponding to the input digital constellation symbols.

12. The system according to claim 11, wherein said modulator is operative for forming N data subcarriers, where N is not restricted to powers of 2.

13. The system according to claim 11, wherein said modulator is operative for modulating data subcarriers using quadrature amplitude modulation (QAM).

14. The system according to claim 11, and further comprising a field programmable gate array (FPGA) or digital signal processor (DSP) operative for performing logical shifts and additions.

15. A method of communicating data, comprising:

approximating frequencies of sine and cosine basis waveforms using complex exponential functions;

storing the complex exponential functions within at least one memory element;

adding and subtracting the complex exponential functions to generate an orthogonal frequency division multiplexed (OFDM) communications signal as a plurality of N data subcarriers that carry communications data; and

transmitting the OFDM communications signal wherein said logic circuit is operative for logically shifting and adding cosine (nkω

/N) and sine (nkω

/N) corresponding to the input digital constellation symbols.

16. The method according to claim 15, which further comprises forming N data subcarriers, where N is not restricted to powers of 2.

17. The method according to claim 15, which further comprises modulating data subcarriers using quadrature amplitude modulation (QAM).

18. The method according to claim 15, which further comprises modulating the data subcarriers using quadrature phase shift keying (QPSK) or binary phase shift keying (BPSK) modulation.

19. The method according to claim 15, which further comprises adding and subtracting within a field programmable gate array (FPGA) or digital signal processor (DSP) using logical shifts and additions.

20. The method according to claim 15, which further comprises adding and subtracting as multiplies of type +/−

2^p.