Techniques for writing data to different portions of storage devices based on write frequency

• US 8,230,184 B2
• Filed: 11/30/2010
• Issued: 07/24/2012
• Est. Priority Date: 11/19/2007
• Status: Expired due to Fees

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: Danilak, Radoslav
• Primary Examiner(s): NGUYEN, HIEP T
• Application Number:
  US12/956,926
• Publication Number:
  US 20110276745A1
• Time in Patent Office: 602 Days
• Field of Search: None
• US Class Current: 711/154
• CPC Class Codes: G06F 11/008 Reliability or availability analysis
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels

Abstract

Techniques for writing data to different portions of storage devices based on write frequencies are disclosed. Frequencies of data writes to various portions of a memory are monitored. The memory includes various storage technologies. Each portion includes one of the storage technologies and has a respective lifetime. An order that the portions are written into and recycled is dynamically managed to equalize respective life expectancies of the portions in view of differences in endurance values of the portions, the monitored frequencies of data writes, and the lifetimes. In some embodiments, the storage technologies include Single-Level Cell (SLC) flash memory storage technology and Multi-Level Cell (MLC) flash memory storage technology. The SLC and MLC flash memory storage technologies are optionally integrated in one device. In some embodiments, the storage technologies include two or more different types of SLC flash memory storage technologies, optionally integrated in one device.

Claims

1. A method comprising:

monitoring frequency values of writes of data into portions of a memory, the memory comprising a plurality of storage technologies, each portion comprising a particular one of the storage technologies and having a respective lifetime; and

dynamically managing an order that the portions are written into and recycled to equalize respective life expectancies of the portions in view of differences in endurance values of the portions, the monitored frequency values, and the respective lifetimes.

2. The method of claim 1, wherein the dynamically managing is further based at least in part on a threshold.

3. The method of claim 2, further comprising determining the threshold.

4. The method of claim 3, wherein the data is written to a second portion of the portions if the frequency of the data written to a first portion of the portions exceeds the threshold.

5. The method of claim 4, wherein the first portion comprises a single-level cell (SLC) storage technology of the storage technologies.

6. The method of claim 3, wherein the data is written to a second portion of the portions if the frequency of the data written to a first portion of the portions does not exceed the threshold.

7. The method of claim 6, wherein the first portion comprises a multi-level cell (MLC) storage technology of the storage technologies.

8. The method of claim 1, wherein the plurality of storage technologies comprises single-level cell (SLC) flash memory storage technology and multi-level cell (MLC) flash memory storage technology, and the SLC flash memory and the MLC flash memory storage technologies are integrated in one device.

9. The method of claim 8, further comprising programmatically determining the particular storage technology of at least one of the portions.

10. The method of claim 1, wherein the plurality of storage technologies comprises two different types of single-level cell (SLC) flash memory storage technologies, and the two different types of SLC flash memory storage technologies are integrated in one device.

11. The method of claim 1, wherein a first one of the portions comprises a single-level cell (SLC) storage technology and a second one of the portions comprises a multi-level cell (MLC) storage technology, and the monitored frequency value of the first portion is relatively high and the monitored frequency value of the second portion is relatively low.

12. The method of claim 11, wherein the SLC and the MLC storage technologies are integrated in one device.

13. The method of claim 1, further comprising dynamically selecting which of the portions to write into based at least in part on the monitored frequency values and the respective lifetimes.

14. The method of claim 1, wherein the plurality of storage technologies comprises a solid state storage technology.

15. The method of claim 14, wherein the solid state storage technology comprises flash memory technology.

16. The method of claim 15, wherein the flash memory technology includes NAND flash memory.

17. The method of claim 1, wherein the monitoring is at least in part via a lifetime estimator module, the portions correspond to storage devices, and the lifetime estimator module computes estimated lifetimes of the storage devices based at least in part on storage commands.

18. The method of claim 1, wherein the portions comprise a first portion comprising multi-level cell (MLC) storage technology of a first endurance and a second portion comprising MLC storage technology of a second endurance.

19. The method of claim 1, wherein the portions comprise a first portion comprising single-level cell (SLC) storage technology and a second portion comprising multi-level cell (MLC) storage technology and the dynamically managing comprises selecting the first portion when frequency of data written is at least a particular value and selecting the second portion otherwise.

20. The method of claim 1, wherein the dynamically managing is further in view of any one or more of

a length of time to perform a program operation on at least a part of one of the portions,

a number of corrected errors with respect to at least a part of one of the portions, and

a number of intervening reads with respect to at least a part of one of the portions.

21. A non-transitory computer readable medium having a set of instructions stored therein which when executed by a processor causes the processor to perform functions, comprising:

monitoring frequency values of writes of data into portions of a memory, the memory comprising a plurality of storage technologies, each portion comprising a particular one of the storage technologies and having a respective lifetime; and

dynamically managing an order that the portions are written into and recycled to equalize respective life expectancies of the portions in view of differences in endurance values of the portions, the monitored frequency values, and the respective lifetimes.

22. An apparatus, comprising:

means for monitoring frequency values of writes of data into portions of a memory, the memory comprising a plurality of storage technologies, each portion comprising a particular one of the storage technologies and having a respective lifetime; and

means for dynamically managing an order that the portions are written into and recycled to equalize respective life expectancies of the portions in view of differences in endurance values of the portions, the monitored frequency values, and the respective lifetimes.

23. The apparatus of claim 22, wherein at least the means for monitoring is coupled between a system and the memory.