On demand hard disk drive system on a chip power control scheme

• US 8,230,244 B1
• Filed: 04/30/2008
• Issued: 07/24/2012
• Est. Priority Date: 04/30/2008
• Status: Active Grant

• Current Assignee: SK Hynix Memory Solutions Incorporated (SK Hynix Inc.)
• Original Assignee: Link_A_Media Devices Corporation (SK Hynix Inc.)
• Inventors: Yeung, Kwok Alfred, Chan, Kin Ming
• Primary Examiner(s): Rehman, Mohammed
• Application Number:
  US12/150,932
• Time in Patent Office: 1,546 Days
• Field of Search: 713/320
• US Class Current: 713/320
• CPC Class Codes: G06F 1/3221 of disk drive devices
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A technique for controlling a group of logic included in a hard disk drive system, is performed by obtaining an access instruction associated with accessing a target location in a disk included in the hard disk system. A number of units until the target location is accessed is calculated. It is determined whether to put the group of logic into a lower power state based at least in part on the number of units until the target location is accessed and a warm up time associated with the group of logic; in the event it is determined to do so, the group of logic is put into the lower power state.

Claims

1. A method for controlling a group of logic included in a hard disk drive system, comprising:

obtaining an access instruction associated with accessing a target location in a disk included in the hard disk system;

calculating a number of units until the target location is accessed;

determining whether there is time for the group of logic to transition from a lower power state to an operational state in which the group of logic is configured to access the target location, in the event the group of logic is put into the lower power state, wherein the determination is based at least in part on (1) the number of units between (a) a current location of a read head associated with the hard disk system and (b) the target location which is different from the current location of the read head and (2) a warm up time associated with the group of logic, wherein;

the group of logic includes a phase lock loop (PLL); and

the warm up time is greater than or equal to a lock time associated with the PLL, such that the warm up time is sufficient for the PLL to achieve a lock state; and

in the event it is determined there is time for each piece of logic in the group to transition, using a processor to put the group of logic into the lower power state.

2. The method as recited in claim 1 further comprising in the event there is no second access instruction after the first access instruction, putting the group of logic into a lower power state.

3. The method as recited in claim 2, wherein putting the group of logic into a lower power state is performed automatically in the event is determined there is no second access instruction after the first access instruction.

4. The method as recited in claim 2, wherein the lower power state into which the group of logic is put in the event there is no second access instruction after the first access instruction includes a lowest power state.

5. The method as recited in claim 1, wherein the method is performed in software.

6. The method as recited in claim 5, wherein reducing power includes inserting, between the first access instruction and the second access instruction in the sequence of access instructions, a power instruction which when executed causes the group of logic to enter a lower power state.

7. The method as recited in claim 1, wherein the method is performed in hardware.

8. The method as recited in claim 1, wherein the number of units is expressed in time.

9. The method as recited in claim 1, wherein the number of units is expressed in sectors.

10. The method as recited in claim 1, wherein the first access instruction is a read instruction and the group of logic is associated with processing a read signal.

11. The method as recited in claim 1 further comprising in the event it is determined there is time for each piece of logic in the group to transition, putting the group of logic into a full power state prior to accessing the second target location as a result of executing the second access instruction.

12. The method as recited in claim 1, wherein:

in a command queue, a second access instruction occurs before the access instruction; and

putting the group of logic into the lower power state includes inserting an instruction associated with a power state between the second access instruction and the access instruction in the command queue.

13. The method as recited in claim 12, wherein determining whether there is time for the group of logic to transition occurs after the second access instruction is performed.

14. A system for controlling a group of logic included in a hard disk drive system, comprising:

an interface configured to obtain an access instruction associated with accessing a target location in a disk included in the hard disk system;

a calculator configured to calculate a number of units until the target location is accessed; and

a controller configured to;

determine whether there is time for the group of logic to transition from a lower power state to an operational state in which the group of logic is configured to access the target location, in the event the group of logic is put into the lower power state, wherein the determination is based at least in part on (1) the number of units between (a) a current location of a read head associated with the hard disk system and (b) the target location which is different from the current location of the read head and (2) a warm up time associated with the group of logic, wherein;

the group of logic includes a phase lock loop (PLL); and

the warm up time is greater than or equal to a lock time associated with the PLL, such that the warm up time is sufficient for the PLL to achieve a lock state; and

in the event it is determined there is time for each piece of logic in the group to transition, put the group of logic into the lower power state.

15. The system as recited in claim 14, wherein:

in a command queue, a second access instruction occurs before the access instruction; and

the controller is configured to put the group of logic into the lower power state including by;

inserting an instruction associated with a power state between the second access instruction and the access instruction in the command queue.

16. The system as recited in claim 15, wherein the controller is configured to determining whether there is time for the group of logic to transition after the second access instruction is performed.

17. A computer program product for controlling a group of logic included in a hard disk drive system, the computer program product being embodied in a non-transitory computer readable storage medium and comprising computer instructions for:

obtaining an access instruction associated with accessing a target location in a disk included in the hard disk system;

calculating a number of units until the target location is accessed;

determining whether there is time for the group of logic to transition from a lower power state to an operational state in which the group of logic is configured to access the target location, in the event the group of logic is put into the lower power state, wherein the determination is based at least in part on (1) the number of units between (a) a current location of a read head associated with the hard disk system and (b) the target location which is different from the current location of the read head and (2) a warm up time associated with the group of logic, wherein;

the group of logic includes a phase lock loop (PLL); and

the warm up time is greater than or equal to a lock time associated with the PLL, such that the warm up time is sufficient for the PLL to achieve a lock state; and

in the event it is determined there is time for each piece of logic in the group to transition, putting the group of logic into the lower power state.

18. The computer program product as recited in claim 17, wherein:

in a command queue, a second access instruction occurs before the access instruction; and

the computer instructions for putting the group of logic into the lower power state include computer instructions for inserting an instruction associated with a power state between the second access instruction and the access instruction in the command queue.

19. The computer program product as recited in claim 18, wherein the computer instructions for determining whether there is time for the group of logic to transition are performed after the second access instruction is performed.