Schemes for forming barrier layers for copper in interconnect structures
First Claim
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1. A method of forming a semiconductor structure, the method comprising:
- providing a substrate;
forming a low-k dielectric layer over the substrate;
forming an opening extending from a top surface of the low-k dielectric layer into the low-k dielectric layer;
forming a first barrier layer lining the opening;
embedding a conductive wiring in a remaining portion of the opening;
recessing a top edge of the first barrier layer to form a recess, wherein portions of sidewalls of the conductive wiring are exposed; and
forming a second barrier layer covering a top surface and exposed sidewalls of the conductive wiring, wherein the second barrier layer does not extend over the low-k dielectric layer.
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Abstract
A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive wiring into the low-k dielectric layer; and thermal soaking the conductive wiring in a carbon-containing silane-based chemical to form a barrier layer on the conductive wiring. A lining barrier layer is formed in the opening for embedding the conductive wiring. The lining barrier layer may comprise same materials as the barrier layer, and the lining barrier layer may be recessed before forming the barrier layer and may contain a metal that can be silicided.
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Citations
20 Claims
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1. A method of forming a semiconductor structure, the method comprising:
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providing a substrate; forming a low-k dielectric layer over the substrate; forming an opening extending from a top surface of the low-k dielectric layer into the low-k dielectric layer; forming a first barrier layer lining the opening; embedding a conductive wiring in a remaining portion of the opening; recessing a top edge of the first barrier layer to form a recess, wherein portions of sidewalls of the conductive wiring are exposed; and forming a second barrier layer covering a top surface and exposed sidewalls of the conductive wiring, wherein the second barrier layer does not extend over the low-k dielectric layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of forming a semiconductor structure, the method comprising:
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forming an opening in a dielectric layer; forming a barrier layer within the opening; forming a conductive material within the opening, the conductive material having a planar top surface extending across an entire width of the conductive material; removing a portion of the barrier layer to expose a sidewall of the conductive material; and thermal soaking the planar top surface of the conductive material and the barrier layer in a carbon-containing silane-based process gas to form a silicide layer over the conductive material, over the barrier layer, and along the sidewall. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A method of manufacturing a semiconductor structure, the method comprising:
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forming a dielectric layer over a substrate; removing a portion of the dielectric layer to form an opening sidewalls; lining the sidewalls with a barrier layer; filling the opening with a conductive material; planarizing the dielectric layer, the barrier layer, and the conductive material; removing a first portion of the barrier layer after the planarizing without removing the conductive material, the removing the portion of the barrier layer exposing sidewalls of the conductive material, wherein the sidewalls of the conductive material have at least a second portion that is perpendicular to the substrate; and forming a second barrier layer over the conductive material, over the barrier layer, and along the second portion of the conductive material. - View Dependent Claims (17, 18, 19, 20)
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Specification