Semiconductor article having a through silicon via and guard ring

• US 8,232,648 B2
• Filed: 06/01/2010
• Issued: 07/31/2012
• Est. Priority Date: 06/01/2010
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: McGahay, Vincent J., Shapiro, Michael J.
• Primary Examiner(s): Reames, Matthew
• Application Number:
  US12/791,398
• Publication Number:
  US 20110291279A1
• Time in Patent Office: 791 Days
• Field of Search: 257/758, 257/E23.145, 438/637
• US Class Current: 257/758
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/564 Details not otherwise provided for, e.g. protection against moisture getters H01L23/26
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Disclosed is a semiconductor article which includes a semiconductor base portion, a back end of the line (BEOL) wiring portion on the semiconductor base portion, a through silicon via and a guard ring. The semiconductor base portion is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having metallic wiring and insulating material. The BEOL wiring portion does not include a semiconductor material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor base portion. The guard ring surrounds the through silicon via in the BEOL wiring portion.

Claims

1. A semiconductor article comprising:

a semiconductor base portion comprising a semiconductor material;

a back end of the line (BEOL) wiring portion on the semiconductor base portion and comprising a plurality of wiring layers having metallic wiring and insulating material, said BEOL wiring portion excluding a semiconductor material;

a through silicon via providing a conductive path through the BEOL wiring portion and the semiconductor base portion; and

a guard ring surrounding the through silicon via in the BEOL wiring portion, the through silicon via through the semiconductor base portion being free of any guard ring.

2. The semiconductor article of claim 1 wherein the guard ring comprises a plurality of solid metallic portions in the BEOL wiring layers that are stacked in the BEOL wiring portion to form a metallic structure surrounding the through silicon via in the BEOL wiring portion.

3. The semiconductor article of claim 1 wherein the guard ring comprises a metallic material.

4. The semiconductor article of claim 3 wherein the metallic material is selected from the group consisting of copper, aluminum and alloys and mixtures thereof.

5. The semiconductor article of claim 1 wherein the guard ring comprises a nonmetallic material.

6. The semiconductor article of claim 1 wherein the through silicon via comprises copper.

7. The semiconductor article of claim 1 wherein the semiconductor base portion has a first surface and the BEOL wiring portion has a second surface and the through silicon via continuously extends from the first surface to the second surface.

8. The semiconductor article of claim 1 wherein the guard ring is spaced from the through silicon via in the BEOL wiring portion.

9. The semiconductor article of claim 1 wherein the guard ring is a barrier to moisture and metal diffusion.

10. The semiconductor article of claim 1 wherein the through silicon via has a length within the BEOL wiring portion and the guard ring has a length within the BEOL wiring portion such that the length of the guard ring is coextensive with the length of the through silicon via in the BEOL wiring portion.

11. A method of forming a semiconductor article comprising the steps of:

(a) providing a semiconductor base portion comprising a semiconductor material;

(b) forming a back end of the line (BEOL) wiring layer comprising a metallic material and a dielectric material and excluding a semiconductor material, the BEOL wiring layer comprising a contiguous guard ring portion;

(c) repeating step (b) until a predetermined number of BEOL wiring layers have been formed into a BEOL wiring portion with each contiguous guard ring portion being formed over, and in contact with, a previous contiguous guard ring portion to form a guard ring extending through the entire BEOL wiring portion;

(d) forming a through silicon via opening through the BEOL wiring portion and the semiconductor base portion, the through silicon via opening through the BEOL wiring portion being contained wholly within the guard ring, the through silicon via opening through the semiconductor base portion being free of any guard ring; and

(e) depositing metallization in the through silicon via opening to form a through silicon via.

12. The method of claim 11 wherein the guard ring comprises a plurality of solid metallic guard ring portions in the BEOL wiring layers that are stacked in the BEOL wiring portion to form a metallic structure surrounding the through silicon via opening in the BEOL wiring portion.

13. The method of claim 11 wherein the semiconductor base portion has a first surface and the BEOL wiring portion has a second surface and the through silicon via continuously extends from the first surface to the second surface.

14. The method of claim 11 wherein the guard ring is spaced from the through silicon via.

15. A method of forming a semiconductor article comprising the steps of:

(a) forming a semiconductor base portion comprising a semiconductor material;

(b) forming a back end of the line (BEOL) wiring portion comprising a plurality of layers of metallic material and a dielectric material and excluding a semiconductor material;

(c) forming an opening for a guard ring in the BEOL wiring portion;

(d) filling the guard ring opening with a material;

(e) forming a through silicon via opening through the BEOL wiring portion and the semiconductor base portion, the through silicon via opening through the BEOL wiring portion being contained wholly within the guard ring opening, the through silicon via opening through the semiconductor base portion being free of any guard ring; and

(f) depositing metallization in the through silicon via opening to form a through silicon via.

16. The method of claim 15 wherein the guard ring material is a nonmetallic material.

17. The method of claim 15 wherein the guard ring material is a metallic material.