Method of forming a light emitting diode emitter substrate with highly reflective metal bonding

• US 8,236,584 B1
• Filed: 02/11/2011
• Issued: 08/07/2012
• Est. Priority Date: 02/11/2011
• Status: Active Grant

• Current Assignee: Epistar Corporation (Ennostar, Inc.)
• Original Assignee: TSMC Solid State Lighting Ltd. (Ennostar, Inc.)
• Inventors: Yu, Chih-Kuang, Chiu, Ching-Hua, Kuo, Hung-Yi, Chem, Chyi Shyuan, Fu, Wen-Chien, Hsia, Hsing-Kuo
• Primary Examiner(s): Chambliss, Alonzo
• Application Number:
  US13/025,975
• Publication Number:
  US 20120205694A1
• Time in Patent Office: 543 Days
• Field of Search: None
• US Class Current: 438/26
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49107 on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 2224/92247 the second connecting process involving a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/01049 Indium [In]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2933/0033 : relating to semiconductor body packages
• CPC Class Codes: H01L 33/005 : Processes
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/647 : the elements conducting electric current to or from the semiconductor body

Abstract

The present disclosure provides one embodiment of a method for fabricating a light emitting diode (LED) package. The method includes forming a plurality of through silicon vias (TSVs) on a silicon substrate; depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs; forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate and further filling the TSVs; and forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding.

Claims

1. A method of fabricating a light emitting diode (LED) emitter substrate comprising:

forming a plurality of through silicon vias (TSVs) on a silicon substrate;

depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs;

forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate, wherein the metal layer completely fills the TSVs; and

forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding.

2. The method of claim 1, wherein the forming of the metal layer and the forming of the highly reflective bonding pads comprises:

depositing a barrier/seed layer over the dielectric layer on the first side and the second side of the silicon substrate and over the sidewall surfaces of the TSVs;

forming a patterned photo-resist layer over the barrier/seed layer on the first side and the second side of the silicon substrate;

depositing the metal layer over the barrier/seed layer exposed by the patterned photo-resist layer and into the TSVs to fill the TSVs;

depositing a highly reflective metal layer over the metal layer on the second side of the silicon substrate; and

thereafter removing the patterned photo-resist layer from the second side of the silicon substrate to form the plurality of highly reflective bonding pads.

3. The method of claim 2, wherein the depositing of the metal layer comprises using a metal plating process to form the patterned metal layer over the barrier/seed layer and into the TSVs to fill the TSVs.

4. The method of claim 2, wherein the forming of the patterned photo-resist layer comprises forming a dry film laminated on the silicon substrate.

5. The method of claim 2, wherein the removing of the patterned photo-resist layer further comprises removing the patterned photo-resist layer from the first side of the silicon substrate to form a plurality of metal pads on the first side of the silicon substrate.

6. The method of claim 2 further comprising etching to remove the barrier/seed layer underneath the patterned photo-resist layer from the second side of the silicon substrate after the removing of the patterned photo-resist layer.

7. The method of claim 2, wherein the depositing of the highly reflective metal layer comprises using a PVD (physical vapor deposition) process to deposit the highly reflective metal layer over the metal layer on the second side of the silicon substrate.

8. The method of claim 7, wherein the patterned highly reflective metal layer comprises an Al (aluminum) layer.

9. The method of claim 2, wherein the depositing of the highly reflective metal layer includes depositing the highly reflective metal layer over the patterned photo-resist layer, and the removing of the patterned photo-resist layer includes lifting off the highly reflective metal layer over the patterned photo-resist layer.

10. The method of claim 1, further comprising:

bonding a plurality of separated LED dies to a first subset of the highly reflective bonding pads on the second side of the silicon substrate;

forming a bonding wire between metallization contacts from the separated LED dies and a second subset of the highly reflective bonding pads on the second side of the silicon substrate;

forming a phosphor coating and a lens molding over each separated LED die; and

dicing the separated LED die and the silicon substrate into a plurality of individual LED packages.

11. A method of fabricating a light emitting diode (LED) packaging substrate comprising:

forming a plurality of blind vias on a first side of a silicon substrate;

depositing a first dielectric layer over the first side of the silicon substrate and over sidewalls surfaces of the blind vias;

depositing a metal layer over the first dielectric layer and into the blind vias to fill the blind vias;

thinning a second side of the silicon substrate to expose the metal layer in the blind vias;

forming a second dielectric layer over the second side of the silicon substrate and patterned to expose the metal layer in the blind vias;

forming a patterned photo-resist layer over the second dielectric layer;

forming a highly reflective metal layer over the second dielectric layer and over the exposed metal layer in the blind vias; and

removing the patterned photo-resist layer to form a plurality of highly reflective bonding pads and a plurality of highly reflective wire bonding pads on the second side of the silicon substrate.

12. The method of claim 11, wherein the forming of the metal layer comprises:

depositing a barrier/seed layer over the first dielectric layer;

forming a second patterned photo-resist layer over the barrier/seed layer;

depositing the metal layer over the barrier/seed layer exposed by the patterned photo-resist layer and into the blind vias to fill the blind vias; and

removing the second patterned photo-resist layer and the barrier/seed layer underneath the patterned photo-resist layer to form a plurality of metal pads on the first side of the silicon substrate.

13. The method of claim 11, wherein the forming of the second dielectric layer comprises performing an oxidation process to form a silicon oxide self-aligned to silicon portions of the silicon substrate and exposing the metal layer in the blind vias.

14. The method of claim 11, wherein the forming of the second dielectric layer comprises:

depositing the second dielectric layer over the second side of the silicon substrate;

forming another patterned photo-resist layer over the second dielectric layer, wherein the patterned photo-resist layer has openings aligned to the blind vias;

removing the second dielectric layer within the openings of the patterned photo-resist layer to expose the metal layer in the blind vias; and

removing the another patterned photo-resist layer.

15. The method of claim 11, wherein the patterned photo-resist layer includes a dry film photo-resist.

16. The method of claim 11, wherein the forming of the highly reflective metal layer includes using a physical vapor deposition (PVD) process to deposit the highly reflective metal on the second side of the silicon substrate and the removing of the patterned photo-resist layer includes lifting off the highly reflective metal layer over the patterned photo-resist layer.

17. The method of claim 11, wherein the depositing of the metal layer comprises using a metal plating process to deposit the metal layer over the barrier/seed layer and to fill the blind vias.

18. The method of claim 11, further comprising:

bonding a plurality of separated LED dies to the plurality of highly reflective LED bonding pads on the second side of the silicon substrate;

forming a bonding wire between a metallization contact of each separated LED die and one of the highly reflective wire bonding pads on the second side of the silicon substrate;

forming a phosphor coating and a lens molding over each separated LED die; and

dicing the separated LED die and the silicon substrate into a plurality of individual LED packages.

19. A light emitting diode (LED) packaging substrate comprising:

a silicon substrate, wherein a first side and a second side of the silicon substrate is covered with a dielectric layer and wherein a plurality of highly reflective LED bonding pads and a plurality of highly reflective wire bonding pads are disposed on the dielectric layer on the second side of the silicon substrate; and

a plurality of through silicon via (TSV) features disposed in the silicon substrate, wherein the TSV is completely filled with metal, and wherein sidewall surfaces of the TSV features are covered with the dielectric layer, and wherein each of the TSV features connects with one of the highly reflective LED bonding pads or the highly reflective wire bonding pads on the second side of the silicon substrate and also connects with a metal pad on the first side of the silicon substrate.

20. The LED packaging substrate of claim 19, wherein the highly reflective LED bonding pads and the highly reflective wire bonding pads comprise a layer of Al (aluminum) metal.