Method of making a semiconductor chip assembly with a post/base heat spreader and a mulitlevel conductive trace

• US 8,236,619 B2
• Filed: 04/23/2011
• Issued: 08/07/2012
• Est. Priority Date: 03/25/2008
• Status: Expired due to Fees

• Current Assignee: Bridge Semiconductor Corporation
• Original Assignee: Bridge Semiconductor Corporation
• Inventors: Lin, Charles W. C., Wang, Chia-Chung
• Primary Examiner(s): AU, BAC H
• Application Number:
  US13/092,913
• Publication Number:
  US 20110201157A1
• Time in Patent Office: 472 Days
• Field of Search: 438/26, 438/118, 438121-124
• US Class Current: 438/122
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32188 the layer connector connecting to a bonding area protruding from the surface of the item
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48235 connecting the wire to a via metallisation of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83855 Hardening the adhesive by curing, i.e. thermosetting
• CPC Class Codes: H01L 2224/85207 Thermosonic bonding
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01007 : Nitrogen [N]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01026 : Iron [Fe]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01031 : Gallium [Ga]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0104 : Zirconium [Zr]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/0134 : Quaternary Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/15174 : in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 33/483 : Containers
• CPC Class Codes: H01L 33/642 : characterized by the shape
• CPC Class Codes: H05K 1/0204 : using means for thermal conduction connection in the thickness direction of the substrate H05K1/0207 takes precedence
• CPC Class Codes: H05K 1/115 : Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 2201/09054 : Raised area or protrusion of metal substrate
• CPC Class Codes: H05K 2201/09509 : Blind vias, i.e. vias having one side closed
• CPC Class Codes: H05K 2201/10106 : Light emitting diode [LED]
• CPC Class Codes: H05K 2203/0369 : Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
• CPC Class Codes: H05K 3/0061 : onto a metallic substrate, e.g. a heat sink heat sinks for electric apparatus H05K7/20
• CPC Class Codes: H05K 3/06 : the conductive material being removed chemically or electrolytically, e.g. by photo-etch process semi-additive methods H05K3/108

Abstract

A method of making a semiconductor chip assembly includes providing a post and a base, mounting a second adhesive on the base, mounting a substrate with a conductive pattern on the second adhesive, mounting a first adhesive on the substrate and mounting a conductive layer on the first adhesive, then flowing the first adhesive upward between the post and the conductive layer and flowing the second adhesive upward between the post and the substrate, solidifying the adhesives, then providing a conductive trace that includes a pad, a terminal, the conductive pattern, first and second vias and a selected portion of the conductive layer, mounting a semiconductor device on the post, wherein a heat spreader includes the post and the base, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Claims

1. A method of making a semiconductor chip assembly, comprising:

providing a post, a base, a first adhesive, a second adhesive, a substrate and a conductive layer, wherein

the post is adjacent to the base, extends above the base in an upward direction, extends into a first opening in the first adhesive and is aligned with a second opening in the second adhesive, a hole in the conductive layer and an aperture in the substrate,

the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions,

the second adhesive is mounted on and extends above the base and is non-solidified,

the substrate is mounted on and extends above the second adhesive, wherein the substrate includes a first conductive segment, a second conductive segment and a dielectric layer, the first conductive segment is attached to and extends above the dielectric layer, the second conductive segment is attached to and extends below the dielectric layer and the dielectric layer is solidified,

the first adhesive is mounted on and extends above the substrate and is non-solidified, and

the conductive layer is mounted on and extends above the first adhesive;

then

flowing the first adhesive into and upward in a first gap located in the hole between the post and the conductive layer;

flowing the second adhesive into and upward in a second gap located in the aperture between the post and the substrate;

solidifying the adhesives;

then

providing a conductive trace that includes a pad, a terminal, a conductive pattern, a first via, a second via and a selected portion of the conductive layer, wherein the conductive pattern is a part of the substrate and includes the first and/or second conductive segment, the first via extends to the conductive pattern, the second via extends to the conductive pattern and an electrically conductive path between the pad and the terminal includes the conductive pattern and the vias, an electrically conductive path between the pad and the conductive pattern includes the first via and an electrically conductive path between the terminal and the conductive pattern includes the second via;

then

mounting a semiconductor device on the post, wherein a heat spreader includes the post and the base and the semiconductor device overlaps the post;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the base.

2. The method of claim 1, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

3. The method of claim 1, wherein:

providing the first adhesive includes providing a first prepreg with a first uncured epoxy and providing the second adhesive includes providing a second prepreg with a second uncured epoxy;

flowing the first adhesive includes melting the first uncured epoxy and compressing the first uncured epoxy between the conductive layer and the substrate and flowing the second adhesive includes melting the second uncured epoxy and compressing the second uncured epoxy between the base and the substrate; and

solidifying the first adhesive includes curing the first uncured epoxy and solidifying the second adhesive includes curing the second uncured epoxy.

4. The method of claim 1, wherein flowing the adhesives includes merging the adhesives into a single unitary adhesive that fills the gaps.

5. The method of claim 1, wherein providing the first via includes forming a first window that extends through the conductive layer and the first adhesive and selectively exposes the conductive pattern and then depositing the first via into the first window.

6. The method of claim 1, wherein providing the second via includes forming a second window that extends through the base and the second adhesive and selectively exposes the conductive pattern and then depositing the second via into the second window.

7. The method of claim 1, wherein providing the pad includes removing selected portions of the conductive layer after forming the first via.

8. The method of claim 1, wherein providing the pad includes:

grinding the post, the first adhesive and the conductive layer such that the post, the first adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the conductive layer using an etch mask that defines the pad.

9. The method of claim 1, wherein providing the terminal includes removing selected portions of the base after forming the second via.

10. The method of claim 1, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

11. A method of making a semiconductor chip assembly, comprising:

providing a post and a base, wherein the post is adjacent to and integral with the base and extends above the base in an upward direction, and the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions;

providing a first adhesive, wherein a first opening extends through the first adhesive;

providing a second adhesive, wherein a second opening extends through the second adhesive;

providing a conductive layer, wherein a hole extends through the conductive layer;

providing a substrate that includes a first conductive segment, a second conductive segment and a dielectric layer, wherein an aperture extends through the substrate;

mounting the second adhesive on the base, including inserting the post into the second opening, wherein the second adhesive extends above the base and is non-solidified;

mounting the substrate on the second adhesive, including aligning the post with the aperture, wherein the substrate extends above the second adhesive, the first conductive segment is attached to and extends above the dielectric layer, the second conductive segment is attached to and extends below the dielectric layer and the dielectric layer is solidified;

mounting the first adhesive on the substrate, including aligning the post with the first opening, wherein the first adhesive extends above the substrate and is non-solidified;

mounting the conductive layer on the first adhesive, including aligning the post with the hole, wherein the conductive layer extends above the first adhesive;

then applying heat to melt the adhesives;

moving the base and the conductive layer towards one another, thereby moving the post upward in the hole and the aperture, applying pressure to the molten first adhesive between the conductive layer and the substrate, applying pressure to the molten second adhesive between the base and the substrate, forcing the molten first adhesive to flow into and upward in a first gap located in the hole between the post and the conductive layer and forcing the molten second adhesive to flow into and upward in a second gap located in the aperture between the post and the substrate;

applying heat to solidify the molten adhesives, thereby mechanically attaching the post to the conductive layer, the post to the substrate, the base to the substrate and the conductive layer to the substrate;

then

providing a conductive trace that includes a pad, a terminal, a conductive pattern, a first via, a second via and a selected portion of the conductive layer, wherein the conductive pattern is a part of the substrate and includes the first and/or second conductive segment, the first via extends to the conductive pattern, the second via extends to the conductive pattern and an electrically conductive path between the pad and the terminal includes the conductive pattern and the vias, an electrically conductive path between the pad and the conductive pattern includes the first via and an electrically conductive path between the terminal and the conductive pattern includes the second via;

then

mounting a semiconductor device on the post, wherein a heat spreader includes the post and the base and the semiconductor device overlaps the post;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the base.

12. The method of claim 11, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

13. The method of claim 11, wherein:

providing the first adhesive includes providing a first prepreg with a first uncured epoxy and providing the second adhesive includes providing a second prepreg with a second uncured epoxy;

flowing the first adhesive includes melting the first uncured epoxy and compressing the first uncured epoxy between the conductive layer and the substrate and flowing the second adhesive includes melting the second uncured epoxy and compressing the second uncured epoxy between the base and the substrate; and

solidifying the first adhesive includes curing the first uncured epoxy and solidifying the second adhesive includes curing the second uncured epoxy.

14. The method of claim 11, wherein flowing the adhesives includes merging the adhesives into a single unitary adhesive that fills the gaps.

15. The method of claim 11, wherein providing the first via includes forming a first window that extends through the conductive layer and the first adhesive and selectively exposes the conductive pattern and then depositing the first via into the first window.

16. The method of claim 11, wherein providing the second via includes forming a second window that extends through the base and the second adhesive and selectively exposes the conductive pattern and then depositing the second via into the second window.

17. The method of claim 11, wherein providing the pad includes removing selected portions of the conductive layer after forming the first via.

18. The method of claim 11, wherein providing the pad includes:

grinding the post, the first adhesive and the conductive layer such that the post, the first adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the conductive layer using an etch mask that defines the pad.

19. The method of claim 11, wherein providing the terminal includes removing selected portions of the base after forming the second via.

20. The method of claim 11, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

21. A method of making a semiconductor chip assembly, comprising:

providing a post, a base, a first adhesive, a second adhesive, a substrate and a conductive layer, wherein

the post is adjacent to and integral with the base, extends above the base in an upward direction, extends through a first opening in the first adhesive into an aperture in the substrate and is aligned with a second opening in the second adhesive and a hole in the conductive layer,

the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions,

the second adhesive is mounted on and extends above the base, contacts and is sandwiched between the base and the substrate and is non-solidified,

the substrate is mounted on and extends above the second adhesive and contacts and is sandwiched between the adhesives, wherein the substrate includes a first conductive segment, a second conductive segment and a dielectric layer, the first conductive segment is attached to and extends above the dielectric layer, the second conductive segment is attached to and extends below the dielectric layer and the dielectric layer contacts and is sandwiched between the conductive segments and is solidified,

the first adhesive is mounted on and extends above the substrate, contacts and is sandwiched between the conductive layer and the substrate and is non-solidified, and

the conductive layer is mounted on and extends above the first adhesive;

then

flowing the first adhesive into and upward in a first gap located in the hole between the post and the conductive layer;

flowing the second adhesive into and upward in a second gap located in the aperture between the post and the substrate;

flowing the adhesives into contact with one another;

solidifying the adhesives;

then

providing a conductive trace that includes a pad, a terminal, a conductive pattern, a first via, a second via and a selected portion of the conductive layer, wherein the pad is located above the substrate, the terminal is located below the substrate, the conductive pattern is a part of the substrate and includes the first and/or second conductive segment, the first via extends through the first adhesive and extends to the conductive pattern, the second via extends through the second adhesive and extends to the conductive pattern and an electrically conductive path between the pad and the terminal includes the conductive pattern and the vias, an electrically conductive path between the pad and the conductive pattern includes the first via and an electrically conductive path between the terminal and the conductive pattern includes the second via;

providing a cap that extends above and is adjacent to and covers in the upward direction and extends laterally from a top of the post and that overlaps the aperture and includes a selected portion of the conductive layer;

then

mounting a semiconductor device on the cap, wherein a heat spreader includes the post, the base and the cap and the semiconductor device overlaps the post;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the cap, thereby thermally connecting the semiconductor device to the base.

22. The method of claim 21, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

23. The method of claim 21, wherein:

providing the first adhesive includes providing a first prepreg with a first uncured epoxy and providing the second adhesive includes providing a second prepreg with a second uncured epoxy;

flowing the first adhesive includes melting the first uncured epoxy and compressing the first uncured epoxy between the conductive layer and the substrate and flowing the second adhesive includes melting the second uncured epoxy and compressing the second uncured epoxy between the base and the substrate; and

solidifying the first adhesive includes curing the first uncured epoxy and solidifying the second adhesive includes curing the second uncured epoxy.

24. The method of claim 21, wherein flowing the adhesives includes merging the adhesives into a single unitary adhesive that fills the gaps.

25. The method of claim 21, wherein providing the pad and the cap includes:

grinding the post, the first adhesive and the conductive layer such that the post, the first adhesive and the conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the conductive layer using an etch mask that defines the pad and the cap.

26. The method of claim 21, wherein providing the pad and the first via includes:

forming a window that extends through the conductive layer and the first adhesive and selectively exposes the conductive pattern after solidifying the first adhesive;

then

depositing a plated layer on the post, the conductive layer, the first adhesive and the conductive pattern, wherein the plated layer covers the post in the upward direction and forms the first via in the window;

then forming an etch mask on the plated layer that defines the pad;

etching the conductive layer and the plated layer in a pattern defined by the etch mask;

and then

removing the etch mask.

27. The method of claim 21, wherein providing the terminal includes removing selected portions of the base using an etch mask that defines the terminal after forming the second via.

28. The method of claim 21, wherein providing the terminal and the second via includes:

forming a window that extends through the base and the second adhesive and selectively exposes the conductive pattern after solidifying the second adhesive;

then

depositing a plated layer on the base, the second adhesive and the conductive pattern, wherein the plated layer covers the post in the downward direction and forms the second via in the window;

then

forming an etch mask on the plated layer that defines the terminal;

etching the base and the plated layer in a pattern defined by the etch mask, wherein the terminal includes an unetched portion of the base that is adjacent to the second via and spaced and separated from and no longer part of the base; and

then

removing the etch mask.

29. The method of claim 21, wherein providing the pad, the terminal, the cap and the vias includes:

forming a first window that extends through the conductive layer and the first adhesive and selectively exposes the conductive pattern after solidifying the first adhesive;

forming a second window that extends through the base and the second adhesive and selectively exposes the conductive pattern after solidifying the second adhesive;

then

depositing a first plated layer on the post, the conductive layer, the first adhesive and the conductive pattern, wherein the first plated layer covers the post in the upward direction and forms the first via in the first window;

depositing a second plated layer on the base, the second adhesive and the conductive pattern, wherein the second plated layer covers the post in the downward direction and forms the second via in the second window;

then

forming a first etch mask on the first plated layer that defines the pad and the cap;

forming a second etch mask on the second plated layer that defines the terminal;

then

etching the conductive layer and the first plated layer in a pattern defined by the first etch mask;

etching the base and the second plated layer in a pattern defined by the second etch mask;

and then removing the etch masks.

30. The method of claim 21, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the cap, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the cap.

31. A method of making a semiconductor chip assembly, comprising:

providing a post and a base, wherein the post is adjacent to and integral with the base and extends above the base in an upward direction, and the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions;

providing a first adhesive, wherein a first opening extends through the first adhesive;

providing a second adhesive, wherein a second opening extends through the second adhesive;

providing a conductive layer, wherein a hole extends through the conductive layer;

providing a substrate that includes a first conductive segment, a second conductive segment and a dielectric layer, wherein an aperture extends through the substrate;

mounting the second adhesive on the base, including inserting the post into the second opening, wherein the second adhesive contacts and extends above the base and is non-solidified;

mounting the substrate on the second adhesive, including inserting the post into the aperture, wherein the substrate contacts and extends above the second adhesive, the first conductive segment is attached to and extends above the dielectric layer, the second conductive segment is attached to and extends below the dielectric layer and the dielectric layer contacts and is sandwiched between the conductive segments and is solidified;

mounting the first adhesive on the substrate, including inserting the post into the first opening, wherein the first adhesive contacts and extends above the substrate and is non-solidified;

mounting the conductive layer on the first adhesive, including aligning the post with the hole, wherein the conductive layer contacts and extends above the first adhesive;

then

applying heat to melt the adhesives;

moving the base and the conductive layer towards one another, thereby moving the post upward in the hole and the aperture, applying pressure to the molten first adhesive between the conductive layer and the substrate, applying pressure to the molten second adhesive between the base and the substrate, forcing the molten first adhesive to flow into and upward in a first gap located in the hole between the post and the conductive layer, forcing the molten second adhesive to flow into and upward in a second gap located in the aperture between the post and the substrate and forcing the molten adhesives to contact and merge with one another;

applying heat to solidify the molten adhesives, thereby mechanically attaching the post to the conductive layer, the post to the substrate, the base to the substrate and the conductive layer to the substrate;

then

providing a conductive trace that includes a pad, a terminal, a conductive pattern, a first via, a second via and a selected portion of the conductive layer, wherein the pad is located above the substrate, the terminal is located below the substrate, the conductive pattern is a part of the substrate and includes the first and/or second conductive segment, the first via extends through the first adhesive and extends to the conductive pattern, the second via extends through the second adhesive and extends to the conductive pattern and an electrically conductive path between the pad and the terminal includes the conductive pattern and the vias, an electrically conductive path between the pad and the conductive pattern includes the first via and an electrically conductive path between the terminal and the conductive pattern includes the second via;

providing a cap that extends above and is adjacent to and covers in the upward direction and extends laterally from a top of the post and that covers the aperture in the upward direction and includes a selected portion of the conductive layer;

then

mounting a semiconductor device on the cap, wherein a heat spreader includes the post, the base and the cap and the semiconductor device overlaps the post;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and

thermally connecting the semiconductor device to the cap, thereby thermally connecting the semiconductor device to the base.

32. The method of claim 31, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate and defines the post;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate, wherein the post includes an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess and the base includes an unetched portion of the metal plate below the post and the recess; and

then

removing the etch mask.

33. The method of claim 31, wherein:

providing the first adhesive includes providing a first prepreg with a first uncured epoxy and providing the second adhesive includes providing a second prepreg with a second uncured epoxy;

flowing the first adhesive includes melting the first uncured epoxy and compressing the first uncured epoxy between the conductive layer and the substrate and flowing the second adhesive includes melting the second uncured epoxy and compressing the second uncured epoxy between the base and the substrate; and

solidifying the first adhesive includes curing the first uncured epoxy and solidifying the second adhesive includes curing the second uncured epoxy.

34. The method of claim 31, wherein providing the pad, the terminal, the cap and the vias includes:

forming a first window that extends through the conductive layer and the first adhesive and selectively exposes the conductive pattern after solidifying the first adhesive;

forming a second window that extends through the base and the second adhesive and selectively exposes the conductive pattern after solidifying the second adhesive;

then

depositing a first plated layer on the post, the conductive layer, the first adhesive and the conductive pattern, wherein the first plated layer covers the post in the upward direction and forms the first via in the first window;

depositing a second plated layer on the base, the second adhesive and the conductive pattern, wherein the second plated layer covers the post in the downward direction and forms the second via in the second window;

then

forming a first etch mask on the first plated layer that defines the pad and the cap;

forming a second etch mask on the second plated layer that defines the terminal;

then

etching the conductive layer and the first plated layer in a pattern defined by the first etch mask;

etching the base and the second plated layer in a pattern defined by the second etch mask; and

then

removing the etch masks.

35. The method of claim 31, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the cap, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the cap.