Semiconductor device and method of manufacturing semiconductor device

• US 8,237,221 B2
• Filed: 08/22/2011
• Issued: 08/07/2012
• Est. Priority Date: 12/04/2007
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Yagi, Ryotaro, Nishimura, Isamu, Yamaha, Takahisa
• Primary Examiner(s): WILCZEWSKI, MARY A
• Application Number:
  US13/214,271
• Publication Number:
  US 20110298044A1
• Time in Patent Office: 351 Days
• Field of Search: 438/589, 438/270, 257/E29.134, 257/E29.155, 257/E21.19, 257/E21.197, 257/E21.205, 257/330, 257/407
• US Class Current: 257/330
• CPC Class Codes: H01L 21/76202 using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO H01L21/76235 takes precedence; together with vertical isolation, e.g. LOCOS in a SOI substrate, H01L21/76264
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264
• CPC Class Codes: H01L 21/76264 SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
• CPC Class Codes: H01L 21/76286 Lateral isolation by refilling of trenches with polycristalline material
• CPC Class Codes: H01L 21/763 Polycrystalline semiconductor regions H01L21/76264 takes precedence
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66659 with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7835 with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Abstract

The semiconductor device according to the present invention includes a semiconductor layer, a trench formed by digging the semiconductor layer from the surface thereof, a gate insulating film formed on the inner surface of the trench, and a gate electrode made of silicon embedded in the trench through the gate insulating film. The gate electrode has a high-conductivity portion formed to cover the gate insulating film with a relatively high conductivity and a low-conductivity portion formed on a region inside the high-conductivity portion with a relatively low conductivity.

Claims

1. A semiconductor device comprising:

a semiconductor layer;

a trench formed by digging the semiconductor layer from a surface thereof;

a gate insulating film formed on an inner surface of the trench; and

a gate electrode made of silicon embedded in the trench through the gate insulating film, wherein

the gate electrode has a high-conductivity portion formed to cover the gate insulating film with a relatively high conductivity and a low-conductivity portion formed on a region inside the high-conductivity portion with a relatively low conductivity.

2. The semiconductor device according to claim 1, wherein

the high-conductivity portion is made of doped polysilicon doped with an impurity, and

the low-conductivity portion is made of polysilicon having a lower impurity concentration than the doped polysilicon.

3. The semiconductor device according to claim 2, wherein

the impurity concentration of the high-conductivity portion is uniform in the depth direction of the trench.