Memory device and manufacturing method the same
First Claim
1. A semiconductor device comprising:
- a bit line driver circuit including a column decoder and a read circuit;
a word line driver circuit including a row decoder; and
a memory cell including a first wiring, a second wiring, a transistor, a first conductive layer, a layer, and a second conductive layer, the transistor having a semiconductor film including a channel formation region,wherein the first wiring is electrically connected to the bit line driver circuit,wherein the second wiring is electrically connected to the word line driver circuit,wherein the semiconductor film includes a metal oxide and the metal oxide includes indium,wherein the first conductive layer is electrically connected to the transistor,wherein each of the layer and the second conductive layer is located over the transistor,wherein the first conductive layer is overlapped with the second conductive layer, andwherein the layer is interposed between the first conductive layer and the second conductive layer.
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Accused Products
Abstract
A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.
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Citations
35 Claims
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1. A semiconductor device comprising:
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a bit line driver circuit including a column decoder and a read circuit; a word line driver circuit including a row decoder; and a memory cell including a first wiring, a second wiring, a transistor, a first conductive layer, a layer, and a second conductive layer, the transistor having a semiconductor film including a channel formation region, wherein the first wiring is electrically connected to the bit line driver circuit, wherein the second wiring is electrically connected to the word line driver circuit, wherein the semiconductor film includes a metal oxide and the metal oxide includes indium, wherein the first conductive layer is electrically connected to the transistor, wherein each of the layer and the second conductive layer is located over the transistor, wherein the first conductive layer is overlapped with the second conductive layer, and wherein the layer is interposed between the first conductive layer and the second conductive layer. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor device comprising:
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a bit line driver circuit including a column decoder and a read circuit; a word line driver circuit including a row decoder; and a memory cell including a first wiring, a second wiring, a first transistor, and a second transistor, at least one of the first transistor and the second transistor having a semiconductor film including a channel formation region, wherein the first wiring is electrically connected to the bit line driver circuit, wherein the second wiring is electrically connected to the word line driver circuit, and wherein the semiconductor film includes a metal oxide and the metal oxide includes indium. - View Dependent Claims (7, 8, 9, 10, 11)
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12. A semiconductor device comprising:
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an integrated circuit including a memory, the memory comprising; a bit line driver circuit including a column decoder and a read circuit; a word line driver circuit including a row decoder; and a memory cell including a first wiring, a second wiring, and a transistor, the transistor having a semiconductor film including a channel formation region; and an antenna electrically connected to the integrated circuit, wherein the first wiring is electrically connected to the bit line driver circuit, wherein the second wiring is electrically connected to the word line driver circuit, and wherein the semiconductor film includes a metal oxide and the metal oxide includes indium. - View Dependent Claims (13, 14, 15, 16)
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17. A semiconductor device comprising:
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an integrated circuit including a memory, the memory comprising; a bit line driver circuit including a column decoder and a read circuit; a word line driver circuit including a row decoder; and a memory cell including a first wiring, a second wiring, a first transistor, and a second transistor, at least one of the first transistor and the second transistor having a semiconductor film including a channel formation region; and an antenna electrically connected to the integrated circuit, wherein the first wiring is electrically connected to the bit line driver circuit, wherein the second wiring is electrically connected to the word line driver circuit, and wherein the semiconductor film includes a metal oxide and the metal oxide includes indium. - View Dependent Claims (18, 19, 20, 21, 22)
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23. A semiconductor device comprising:
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an integrated circuit including a power source circuit, a clock generator circuit, a control circuit and a memory, the memory comprising; a bit line driver circuit including a column decoder and a read circuit; a word line driver circuit including a row decoder; and a memory cell including a first wiring, a second wiring, and a transistor, the transistor having a semiconductor film including a channel formation region; and an antenna electrically connected to the integrated circuit, wherein the first wiring is electrically connected to the bit line driver circuit, wherein the second wiring is electrically connected to the word line driver circuit, and wherein the semiconductor film including a metal oxide and the metal oxide includes indium. - View Dependent Claims (24, 25, 26, 27, 28)
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29. A semiconductor device comprising:
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an integrated circuit including a power source circuit, a clock generator circuit, a control circuit and a memory, the memory comprising; a bit line driver circuit including a column decoder and a read circuit; a word line driver circuit including a row decoder; and a memory cell including a first wiring, a second wiring, a first transistor, and a second transistor, at least one of the first transistor and the second transistor having a semiconductor film including a channel formation region; and an antenna electrically connected to the integrated circuit, wherein the first wiring is electrically connected to the bit line driver circuit, wherein the second wiring is electrically connected to the word line driver circuit, and wherein the semiconductor film includes a metal oxide and the metal oxide includes indium. - View Dependent Claims (30, 31, 32, 33, 34, 35)
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Specification