Hardware-based beacon processing

• US 8,238,278 B2
• Filed: 01/08/2007
• Issued: 08/07/2012
• Est. Priority Date: 01/08/2007
• Status: Active Grant

• Current Assignee: Nordic Semiconductor ASA
• Original Assignee: Hellosoft Incorporated (Imagination Technologies Group Ltd.)
• Inventors: Aldaz, Luis, Barman, Kaushik, Johnson, Allan A., Malladi, Raghavendra, Aldaz, legal representative, Luis Sr.
• Primary Examiner(s): NGUYEN, STEVEN H D
• Application Number:
  US11/651,358
• Publication Number:
  US 20080165769A1
• Time in Patent Office: 2,038 Days
• Field of Search: 370/311, 370/347, 370/338, 370/412, 370/392, 709/224
• US Class Current: 370/311
• CPC Class Codes: H04L 12/40013 Details regarding a bus controller

Abstract

Hardware-based beacon processing. A hardware-centric medium access control (MAC) device includes a packet receiver and a beacon processor. The packet receiver receives a plurality of packets comprising at least one beacon packet. The beacon processor receives packets of the plurality of packets and filters out unwanted packets of the plurality of packets without requiring the use of other components of the hardware-centric MAC device and without requiring the use of a microprocessor.

Claims

1. A battery-powered Wireless Local Area Network (WLAN) communication device comprising:

an activity sensor comprising an RF section and an energy detection module, the energy detection module operable to identify on-the-air energy attributable to respective beginnings of packets available to be received at the WLAN communication device;

a PHY module coupled with the activity sensor to be awakened responsive to the activity sensor indicating when a packet is to be at least partially decoded by the PHY and to be shutdown, the PHY module operable to decode a full MAC address from the packet header;

a MAC address parser coupled to the PHY module to receive the full MAC address and to determine whether the packet is to be received at the WLAN communication device by comparing the full MAC address to a MAC address of the WLAN communication device, the MAC address parser operable to be awakened for performing the comparing and to be shutdown after the comparing, wherein packets to be received include beacon packets, the MAC address parser further operable to indicate that the packet being received is not for the WLAN communication device, resulting in shutdown of the PHY module, before completing reception of the packet, the PHY module being in shutdown for at least as long as an estimated remaining length of the packet being received;

a hardware centric Medium Access Controller (MAC) formed separately from the MAC address parser and comprising a beacon processor capable of being awakened from a shutdown state to process a beacon packet, and other components operable to be awakened independently of the beacon processor to process other packets directed to the WLAN communication device, wherein

the PHY module, the MAC address parser, the beacon processor module and the other components of the hardware centric MAC are operable to be awakened and shutdown independent of each other and of a microprocessor; and

said beacon processor is operable to deactivate after processing a beacon packet.

2. The WLAN communication device as recited in claim 1 wherein said beacon processor is operable to reactivate prior to receipt of a packet by a time at least long enough to account for clock drift.

3. The WLAN communication device as recited in claim 1 further comprising a control plane module communicatively coupled to a hardware media access plane module, said control plane module for providing control functions of said hardware-centric MAC.

4. The WLAN communication device as recited in claim 3 wherein said hardware media access plane module is implemented in gate logic, such that real-timing requirements of said hardware-centric MAC are handled in gate logic.

5. An apparatus comprising:

a microprocessor;

a memory communicatively coupled to said microprocessor;

a wireless communication module communicatively coupled to said microprocessor, said wireless communication module for receiving and transmitting packets of voice traffic over a wireless connection and comprising;

an analog to digital converter (ADC)/digital to analog converter (DAC) interface comprising a phase-locked loop (PLL), said ADC/DAC interface for receiving a packet;

a physical layer (PHY) device for decoding at least a header portion of a packet;

a MAC address parser coupled to the PHY device and operable to receive a MAC address decoded from the packet and to determine whether the packet is to be further processed, while the PHY device is wireless communication module is receiving the packet;

a hardware-centric medium access control (MAC) device communicatively coupled to said PHY device, wherein said hardware-centric MAC device is configured to perform beacon processing without requiring use of said microprocessor and to be awakened responsive to the MAC address parser, said hardware-centric MAC device comprising;

a packet receiver configured for receiving at least one packet; and

a beacon processing module for determining whether said packet is a beacon packet and filtering out packets that are not beacon packets, and activating responsive to detecting a beacon packet, the beacon processing portion of the MAC device being otherwise shutdown, wherein the PHY device is further operable to be deactivated while the packet is being transmitted on the wireless connection, responsive to a determination that the packet is not to be further received by the apparatus, the PHY device being shutdown using packet duration information decoded from the packet by the PHY device.

6. The apparatus as recited in claim 5 wherein the usage of packet duration information decoded from the packet is conditioned on passing a cyclic redundancy check for the packet duration information.

7. The apparatus as recited in claim 5 wherein said beacon processing module, said ADC/DAC interface and said PHY device are operable to reactivate prior to receipt of a subsequent packet by a time at least long enough to account for clock drift.

8. The apparatus as recited in claim 5 wherein said hardware-centric MAC device further comprises a control plane for providing control functions of said hardware-centric MAC device.

9. The apparatus as recited in claim 8 further comprising a hardware media access plane module is implemented in gate logic, such that real-timing requirements of said hardware-centric MAC device are handled in gate logic.

10. A method to be performed in a Wireless Local Area Network (WLAN) communication device, the method comprising:

sensing on-the-air energy attributable to a beginning of a packet available to be received at the WLAN communication device;

activating a PHY module coupled with the activity sensor, responsive to the sensing of the packet;

awakening a MAC address parser coupled to receive packet header information from the PHY module during a period of time while the PHY module is decoding the packet;

determining, at the MAC address parser, whether the packet being received is for the wireless communication device;

shutting down the PHY module and the MAC address parser responsive to determining that the packet being received is not for the wireless communication device, wherein the shutting down is performed while the packet is being transmitted and comprises maintaining the PHY module and the MAC address parser in shutdown for a length of time that the packet is being transmitted, the length of time being determined according to information extracted from packet header information by the PHY module;

awakening a beacon processing module for detecting whether the packet being received is a beacon packet, and responsive to detecting a beacon packet, awakening a packet process unit to process the beacon packet without use of any microprocessor;

maintaining a general purpose microprocessor in a sleep state while processing the beacon packet; and

awakening the general purpose microprocessor to process voice data contained in a packet addressed to the MAC address of the WLAN communication device.

11. The method as recited in claim 10 wherein said activating comprises activating said hardware beacon processing module by a time at least long enough to account for clock drift.