Information processing apparatus and information processing method

• US 8,239,051 B2
• Filed: 03/17/2009
• Issued: 08/07/2012
• Est. Priority Date: 06/04/2008
• Status: Expired due to Fees

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Hataida, Makoto
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): WHITTINGTON, ANTHONY T
• Application Number:
  US12/382,487
• Publication Number:
  US 20090307535A1
• Time in Patent Office: 1,239 Days
• Field of Search: 700/94, 714/48
• US Class Current: 700/94
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/0772 Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
• CPC Class Codes: G06F 11/0784 Routing of error reports, e.g. with a specific transmission path or data flow

Abstract

An information processing apparatus includes a node, and a system controlling apparatus connected to the node. The node includes a first detecting unit that detects first error information, a second detecting unit that detects second error information, a retaining unit that retains the first and the second error information, and a temporary retaining unit that retains new first error information and new second error information, and when the first or second error information is initialized, causes the retaining unit to store error information corresponding to the initialized first or second error information. The system controlling apparatus includes a controlling unit connected to the retaining unit, and a firmware that causes the controlling unit to read into the first and second error information and to initialize the new first or second error information.

Claims

1. An information processing apparatus comprising:

a node; and

a system controlling apparatus connected to the node,

wherein the node comprising;

a first detecting unit that detects first error information indicating a level or message of a fault state of hardware;

a second detecting unit that detects second error information indicating the level or message of the fault state of hardware and different from the first error information;

a retaining unit that retains the first error information and the second error information at corresponding bit positions; and

a temporary retaining unit that retains new first error information that is different from the first error information stored in the retaining unit and is newly detected by the first detecting unit and new second error information that is different from the second error information stored in the retaining unit and is newly detected by the second detecting unit, in corresponding bit positions, and when the first or second error information retained in the retaining unit is initialized by the system controlling apparatus, causes the retaining unit to store error information corresponding to the initialized first or second error information from among the retained new first and second error information, and

wherein the system controlling apparatus comprising;

a controlling unit connected to the retaining unit; and

a firmware that causes the controlling unit to read into the first and second error information retained in the retaining unit and causes the controlling unit to initialize the new first or second error information.

2. The information processing apparatus according to claim 1, wherein when the first or second error information is retained in the temporary retaining unit, the controlling unit further suppresses initialization of the first or second error information retained at the bit position corresponding to the first or second error information in the retaining unit, and causes the system controlling apparatus to initialize the first or second error information retained in the temporary retaining unit.

3. An information processing apparatus comprising:

a node; and

a system controlling apparatus connected to the node,

wherein the node comprising;

a first detecting unit that detects first error information indicating a level or message of a fault state of hardware;

a second detecting unit that detects second error information indicating the level or message of the fault state of hardware and different from the first error information;

a retaining unit that retains the first error information detected by the first detecting unit and the second error information detected by the second detecting unit at corresponding bit positions; and

a flag retaining unit that retains an error flag when the first error information detected by the first detecting unit and the second error information detected by the second detecting unit are retained in the retaining unit, and suppresses initialization of the first or second error information by the system controlling apparatus when retaining the error flag, and

wherein the system controlling apparatus comprising;

a controlling unit connected to the retaining unit; and

a firmware that causes the controlling unit to read into the first and second error information retained in the retaining unit and causes the controlling unit to initialize the new first or second error information.

4. An information processing apparatus comprising:

a first node;

a second node connected to the first node; and

a system controlling apparatus connected to the first and second nodes,

wherein the first node comprising;

a first detecting unit that detects first error information indicating a level or message of a fault state of hardware;

a first retaining unit that retains the first error information detected by the first detecting unit; and

a first temporary retaining unit that retains new first error information that is different from the first error information stored in the first retaining unit and is newly detected by the first detecting unit, and when the first error information retained in the first retaining unit is initialized by the system controlling apparatus, causes the first retaining unit to retain the retained first error information,

wherein the second node comprising;

a second detecting unit that detects second error information indicating the level or message of the fault state of hardware;

a second retaining unit that retains the second error information detected by the second detecting unit; and

a second temporary retaining unit that retains new second error information that is different from the second error information stored in the second retaining unit and is newly detected by the second detecting unit, and when the second error information retained in the second retaining unit is initialized by the system controlling apparatus, causes the second retaining unit to retain the retained new second error information, and

the system controlling apparatus comprising;

a controlling unit connected to the first and retaining units; and

a firmware that causes the controlling unit to read into the first and second error information retained in the first and second retaining units, and causes the controlling unit to initialize the first and second error information.

5. A method of processing information for an information processing apparatus including a node having a retaining unit, and a system controlling apparatus having a controlling unit connected to the node, the method comprising:

detecting first error information indicating a level or message of a fault state of hardware;

detecting second error information indicating the level or message of the fault state of hardware and different from the first error information;

retaining the first error information obtained by detecting first error information and the second error information obtained by detecting second error information at corresponding bit positions;

retaining new first error information that is different from the first error information and is newly detected and new second error information that is different from the second error information and is newly detected, in corresponding bit positions, and when the first or second error information is initialized, storing error information corresponding to the initialized first or second error information from among the retained new first and second error information;

controlling to connect the controlling unit to the retaining unit; and

causing the controlling unit to read into the first and second error information retained in the retaining unit and causing the controlling unit to initialize the new first or second error information.

6. The method according to claim 5, wherein controlling to connect the controlling unit further comprising:

when the first or second error information is retained, suppressing initialization of the first or second error information retained at the bit position corresponding to the first or second error information; and

initializing the first or second error information by the system controlling apparatus.

7. A method of processing information for an information processing apparatus including a node having a retaining unit and a system controlling apparatus having a controlling unit connected to the node, the method comprising:

detecting first error information indicating a level or message of a fault state of hardware;

detecting second error information indicating the level or message of the fault state of hardware and different from the first error information;

retaining the first error information detected and the second error information detected at corresponding bit positions; and

retaining an error flag when the first error information and the second error information are retained at the error information retaining step and suppressing initialization of the first or second error information by the system controlling apparatus when the error flag is retained;

controlling to connect the controlling unit to the retaining unit; and

reading into the first and second error information and initializing the new first or second error information.

8. A method of processing information for an information processing apparatus including a first node having a first retaining unit, a second node having a second retaining unit connected to the first node, and a system controlling apparatus having a controlling unit connected to the first and second nodes, the method comprising:

detecting first error information indicating a level or message of a fault state of hardware;

retaining the first error information detected at the first error information detecting step;

retaining new first error information that is different from the first error information and is newly detected at the first error information detecting step, and when the first error information is initialized by the system controlling apparatus, causing the first retaining unit to retain the new first error information;

detecting second error information indicating the level or message of the fault state of hardware;

retaining the second error information detected at the second error information detecting step;

retaining new second error information that is different from the second error information and is newly detected at the second error information detecting step, and when the second error information is initialized by the system controlling apparatus, causing the second retaining unit to retain the new second error information;

controlling to connect the controlling unit to the first and second retaining units; and

causing the controlling unit to read into the first and second error information retained in the first and second retaining units, respectively, and causing the controlling unit to initialize the new first and second error information.