Memory Device with adaptive capacity
First Claim
1. A method for data storage in a memory that includes a plurality of analog memory cells, the method comprising:
- estimating respective achievable storage capacities of the analog memory cells;
assigning the memory cells respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities;
storing the data in the memory cells in accordance with the respective assigned storage configurations;
re-estimating the respective achievable storage capacities of the analog memory cells after the memory has been installed in a host system and used for storing the data in the host system, and modifying the storage configurations responsively to the re-estimated achievable capacities,wherein assigning and modifying the storage configurations comprise maintaining a predetermined margin between the quantities of the data stored in the memory cells and the respective estimated achievable capacities.
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Accused Products
Abstract
A method for data storage in a memory (28) that includes a plurality of analog memory cells (32) includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.
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Citations
110 Claims
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1. A method for data storage in a memory that includes a plurality of analog memory cells, the method comprising:
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estimating respective achievable storage capacities of the analog memory cells; assigning the memory cells respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities; storing the data in the memory cells in accordance with the respective assigned storage configurations; re-estimating the respective achievable storage capacities of the analog memory cells after the memory has been installed in a host system and used for storing the data in the host system, and modifying the storage configurations responsively to the re-estimated achievable capacities, wherein assigning and modifying the storage configurations comprise maintaining a predetermined margin between the quantities of the data stored in the memory cells and the respective estimated achievable capacities. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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29. A method for data storage in a memory that includes a plurality of analog memory cells, the method comprising:
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tracking respective achievable storage capacities of the analog memory cells while the memory is in use in a host system; accepting data for storage in the memory;
selecting a subset of the memory cells for storing the data based on the tracked achievable capacities; andstoring the data in the memory cells of the subset, wherein accepting the data for storage comprises accepting the data in fixed-capacity blocks from the host system and storing the data in variable-capacity groups of the memory cells based on the tracked achievable capacities of variable-size groups, sequentially and irrespective of boundaries between the variable-capacity groups. - View Dependent Claims (30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44)
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45. A method for data storage in a memory that includes a plurality of analog memory cells, the method comprising:
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tracking respective achievable storage capacities of the analog memory cells while the memory is in use in a host system; accepting data for storage in the memory; selecting a subset of the memory cells for storing the data based on the tracked achievable capacities; storing the data in the memory cells of the subset; and reducing a number of memory access operations applied to the memory by caching at least some of the data, wherein caching the at least some of the data comprises transferring the cached data to the memory upon detecting an immediate storage event, comprising at least one event selected from a group of events consisting of an approaching power failure, a time out and an End Of File (EOF) command accepted from the host system.
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46. Data storage apparatus, comprising:
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an interface, which is arranged to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is arranged to estimate respective achievable storage capacities of the memory cells, to assign the memory cells respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities, to store the data in the memory cells in accordance with the respective assigned storage configurations, to re-estimate the respective achievable storage capacities of the analog memory cells after the memory has been installed in a host system and used for storing the data in the host system, and to modify the storage configurations responsively to the re-estimated achievable capacities. - View Dependent Claims (47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73)
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74. Data storage apparatus, comprising:
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an interface, which is arranged to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is arranged to track respective achievable storage capacities of the memory cells while the memory is in use in a host system, to accept data for storage in the memory, to select a subset of the memory cells for storing the data based on the tracked achievable capacities, and to store the data in the memory cells of the subset, wherein the MSP is arranged to accept the data from the host system in fixed-capacity blocks and to store the data in variable-capacity groups of the memory cells based on the tracked achievable capacities of variable-size groups, sequentially and irrespective of boundaries between the variable-capacity groups. - View Dependent Claims (75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89)
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90. Data storage apparatus,
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an interface, which is arranged to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is arranged to track respective achievable storage capacities of the memory cells while the memory is in use in a host system, to accept data for storage in the memory, to select a subset of the memory cells for storing the data based on the tracked achievable capacities, and to store the data in the memory cells of the subset, wherein the MSP is arranged to reduce a number of memory access operations applied to the memory by caching at least some of the data, and to transfer the cached data to the memory upon detecting an immediate storage event comprising at least one event selected from a group of events consisting of an approaching power failure, a time out and an End Of File (EOF) command accepted from the host system.
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91. Data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to estimate respective achievable storage capacities of the memory cells, to assign the memory cells respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities, to store the data in the memory cells in accordance with the respective assigned storage configurations, to re-estimate the respective achievable storage capacities of the analog memory cells after the memory has been installed in a host system and used for storing the data in the host system, and to modify the storage configurations responsively to the re-estimated achievable capacities. - View Dependent Claims (92, 93, 94, 95, 96, 97, 98, 99, 100)
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101. Data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to track respective achievable storage capacities of the memory cells while the memory is in use in a host system, to accept data for storage in the memory, to select a subset of the memory cells for storing the data based on the tracked achievable capacities, and to store the data in the memory cells of the subset, wherein the MSP is arranged to accept the data from the host system in fixed-capacity blocks and to store the data in variable-capacity groups of the memory cells based on the tracked achievable capacities of variable-size groups, sequentially and irrespective of boundaries between the variable-capacity groups. - View Dependent Claims (102, 103, 104, 105, 106, 107, 108, 109, 110)
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Specification