Soldering method and related device for improved resistance to brittle fracture with an intermetallic compound region coupling a solder mass to an Ni layer which has a low concentration of P, wherein the amount of P in the underlying Ni layer is controlled as a function of the expected volume of the solder mass

• US 8,242,378 B2
• Filed: 09/21/2007
• Issued: 08/14/2012
• Est. Priority Date: 09/21/2007
• Status: Active Grant

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Amin, Ahmed, Baiocchi, Frank, Osenbach, John, Vaccaro, Brian T., Delucca, John
• Primary Examiner(s): Gibson, Randy W
• Application Number:
  US12/160,553
• Publication Number:
  US 20100243300A1
• Time in Patent Office: 1,789 Days
• Field of Search: 174/257, 174/259, 174/261, 361/751, 361/771, 361/803
• US Class Current: 174/257
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H05K 3/244 Finish plating of conductors, especially of copper conductors, e.g. for pads or lands selective plating methods H05K3/243; finish plating of conductors made by printing techniques H05K3/246; solder as finish H05K3/3457, e.g. by plating H05K3/3473
• CPC Class Codes: H05K 3/3463 Solder compositions in relation to features of the printed circuit board or the mounting process

Abstract

A lead-free solder joint is formed between a tin-silver-copper solder alloy (SAC), SACX, or other commonly used Pb-free solder alloys, and a metallization layer of a substrate. Interaction of the SAC with the metallization layer forms an intermetallic compound (IMC) that binds the solder mass to the metallization layer. The IMC region is substantially free of any phosphorous-containing layers or regions.

Claims

1. An electronic device comprising:

a core layer;

a nickel layer disposed over at least a portion of the core layer;

a solder mass disposed over at least a portion of the nickel layer; and

an intermetallic compound region coupling the solder mass to the nickel layer, the intermetallic compound region devoid of an effective nickel-phosphorus layer and having no more than 5000 parts per million of phosphorus by weight;

wherein the nickel layer contains an amount of phosphorous controlled as a function of an expected size of the solder mass.

2. The electronic device of claim 1 wherein the intermetallic compound region is devoid of any phosphorus-containing layers thicker than 0.150 μ

m, and is free of any phosphorus-containing regions in excess of 25% of the surface area of the intermetallic compound region and thicker than 0.150 μ

m.

3. The electronic device of claim 1 wherein the intermetallic compound region is devoid of a nickel-phosphorus layer or region having an effective thickness in excess of about 1500 {acute over (Å

)}.

4. The electronic device of claim 1 wherein the intermetallic compound region is devoid of a nickel-phosphorus layer or region having an effective thickness in excess of 150 {acute over (Å

)}.

5. The electronic device of claim 1 wherein the intermetallic compound region is devoid of a nickel-phosphorus layer or region having an effective thickness in excess of 10 {acute over (Å

)}.

6. The electronic device of claim 1 wherein the nickel layer is directly coupled to the intermetallic compound layer and comprises no more than 50 parts per million by weight of phosphorus.

7. The electronic device of claim 1 further comprising a copper layer disposed between the core layer and the nickel layer.

8. The electronic device of claim 7 further comprising a gold layer disposed over at least a portion of the nickel layer, the gold layer comprising no more than 50 parts per million by weight of phosphorus.

9. The electronic device of claim 8 wherein the gold layer comprises no more than 10 parts per million by weight of phosphorus.

10. The electronic device of claim 8 wherein the gold layer is substantially free of phosphorus.

11. An electronic device comprising:

a core layer;

a nickel layer disposed over at least a portion of the core layer;

a solder mass disposed over at least a portion of the nickel layer; and

an intermetallic compound region coupling the solder mass to the nickel layer, the intermetallic compound region substantially free of any nickel-phosphorus layer or region that is thicker than 0.150 μ

m;

wherein the nickel layer contains an amount of phosphorous controlled as a function of an expected size of the solder mass.

12. The electronic device of claim 11 wherein the intermetallic compound region is further substantially free of any nickel-phosphorus layer or region that is thicker than 0.150 μ

m and in excess of 25% of the surface area of the intermetallic compound region.