×

Passive listening in wireless communication

  • US 8,243,638 B2
  • Filed: 01/08/2007
  • Issued: 08/14/2012
  • Est. Priority Date: 01/08/2007
  • Status: Active Grant
First Claim
Patent Images

1. An apparatus comprising:

  • a network physical layer device;

    an activity sensor device for sensing a packet, sensing a silence-to-energy event at a beginning of said packet, and activating the network physical layer device from a shutdown state in response to sensing said packet and said silence-to-energy event, and wherein said activity sensor device is configured for being deactivated subsequent sensing said packet such that said activity sensor device is deactivated at least for a length of said packet;

    said network physical layer device for decoding a physical (PHY) header portion and a Media Access Control header portion of a header of said packet following activation from said shutdown state;

    a media access controller comprising a fixed hardware media access plane implementing IEEE 802.11 series media access control functionality and comprising a receive packet process unit coupled to a programmable microprocessor through a bus interface; and

    a media access control address parser for receiving the Media Access Control header portion of said packet, for processing the Media Access Control header portion of said packet, for activating the media access controller from a shutdown state in response to recognizing a Media Access Control address within said Media Access Control header portion, and for deactivating the network physical layer device responsive to the media access control address parser not recognizing the Media Access Control address and such that the media access controller is not activated if the media access control address parser does not recognize the Media Access Control address, whereinthe media access controller is operable, after activation, to perform the media access control functionality without using the programmable microprocessor and to provide data from the packet to the programmable microprocessor through the bus interface.

View all claims
  • 4 Assignments
Timeline View
Assignment View
    ×
    ×