System including a fine-grained memory and a less-fine-grained memory
First Claim
1. A memory system comprising:
- a non-volatile memory comprising a plurality of pages, where units of the memory smaller than one of the pages of the memory are not independently writable, and where each of the pages of the memory comprises a respective user-accessible portion;
a map configured to associate respective element identifiers of each of a plurality of elements with a respective physical location of the element in the memory, where the respective physical location comprises an address of a respective one of the pages of the memory and a respective offset within the respective page of the memory;
a coalescing buffer comprising a plurality of pages, a size of each of the pages of the coalescing buffer being sufficient to contain the respective user-accessible portion of one of the pages of the memory;
wherein the memory system is configured to write a first one of the elements to the memory bydetermining a particular page of the coalescing buffer according to a respective expected write frequency associated with each of the pages of the coalescing buffer,storing the first element in a first portion of the particular one of the pages of the coalescing buffer,copying the particular page of the coalescing buffer to a particular one of the pages of the memory, andupdating the map so that the address of the respective page of the respective physical location of the first element is an address of the particular page of the memory, and so that the respective offset of the respective physical location of the first element is according to the first portion of the particular page of the coalescing buffer; and
wherein the memory system is further configured, subsequent to the storing of the first element in the particular page of the coalescing buffer and prior to the copying of the particular page of the coalescing buffer to the particular page of the memory, to store a second one of the elements in a second portion of the particular page of the coalescing buffer, the second element different from the first element, the second portion separate from the first portion.
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Accused Products
Abstract
A data processing system includes one or more nodes, each node including a memory sub-system. The sub-system includes a fine-grained, memory, and a less-fine-grained (e.g., page-based) memory. The fine-grained memory optionally serves as a cache and/or as a write buffer for the page-based memory. Software executing on the system uses a node address space which enables access to the page-based memories of all nodes. Each node optionally provides ACID memory properties for at least a portion of the space. In at least a portion of the space, memory elements are mapped to locations in the page-based memory. In various embodiments, some of the elements are compressed, the compressed elements are packed into pages, the pages are written into available locations in the page-based memory, and a map maintains an association between the some of the elements and the locations.
46 Citations
70 Claims
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1. A memory system comprising:
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a non-volatile memory comprising a plurality of pages, where units of the memory smaller than one of the pages of the memory are not independently writable, and where each of the pages of the memory comprises a respective user-accessible portion; a map configured to associate respective element identifiers of each of a plurality of elements with a respective physical location of the element in the memory, where the respective physical location comprises an address of a respective one of the pages of the memory and a respective offset within the respective page of the memory; a coalescing buffer comprising a plurality of pages, a size of each of the pages of the coalescing buffer being sufficient to contain the respective user-accessible portion of one of the pages of the memory; wherein the memory system is configured to write a first one of the elements to the memory by determining a particular page of the coalescing buffer according to a respective expected write frequency associated with each of the pages of the coalescing buffer, storing the first element in a first portion of the particular one of the pages of the coalescing buffer, copying the particular page of the coalescing buffer to a particular one of the pages of the memory, and updating the map so that the address of the respective page of the respective physical location of the first element is an address of the particular page of the memory, and so that the respective offset of the respective physical location of the first element is according to the first portion of the particular page of the coalescing buffer; and wherein the memory system is further configured, subsequent to the storing of the first element in the particular page of the coalescing buffer and prior to the copying of the particular page of the coalescing buffer to the particular page of the memory, to store a second one of the elements in a second portion of the particular page of the coalescing buffer, the second element different from the first element, the second portion separate from the first portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35)
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36. A memory system comprising:
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a non-volatile memory comprising a plurality of pages, where units of the memory smaller than one of the pages of the memory are not independently writable, and where each of the pages of the memory comprises a respective user-accessible portion; a map configured to associate respective element identifiers of each of a plurality of elements with a respective physical location of the element in the memory, where the respective physical location comprises an address of a respective one of the pages of the memory and a respective offset within the respective page of the memory; a coalescing buffer comprising a plurality of pages, a size of each of the pages of the coalescing buffer being sufficient to contain the respective user-accessible portion of one of the pages of the memory; wherein the memory system is configured to write a first one of the elements to the memory by determining a particular page of the coalescing buffer according to a respective expected write frequency associated with the first element, storing the first element in a first portion of the particular one of the pages of the coalescing buffer, copying the particular page of the coalescing buffer to a particular one of the pages of the memory, and updating the map so that the address of the respective page of the respective physical location of the first element is an address of the particular page of the memory, and so that the respective offset of the respective physical location of the first element is according to the first portion of the particular page of the coalescing buffer; and wherein the memory system is further configured, subsequent to the storing of the first element in the particular page of the coalescing buffer and prior to the copying of the particular page of the coalescing buffer to the particular page of the memory, to store a second one of the elements in a second portion of the particular page of the coalescing buffer, the second element different from the first element, the second portion separate from the first portion. - View Dependent Claims (37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70)
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Specification