System and method for secure authentication of a “smart” battery by a host
First Claim
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1. A battery comprising:
- A. an interface including a power bus and a data bus;
B. an integrated circuit including;
i. a public bus connected with the data bus;
ii. a public non-volatile memory connected with the public bus;
iii. a public RAM connected with the public bus;
iv. a private bus separate from the data bus;
v. processor circuitry separately connected with the public bus and the private bus;
vi. a private non-volatile memory connected only with the private bus; and
vii. a private RAM connected only with the private bus; and
C. in which the private non-volatile memory contains an unencrypted identity key, and in which the processor circuitry includes circuits to combine the unencrypted identity key with challenge data received over the public bus, and to send signed challenge data over the public bus.
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Abstract
Systems and methods for providing a battery module 110 with secure identity information and authentication of the identity of the battery 110 by a host 120. In one embodiment, the system for providing a battery module with secure identity information includes: (1) a tamper resistant processing environment 200 located within the battery module 110 and (2) a key generator configured to generate a key based on an identity of the battery module 110 and cause the key to be stored within the tamper resistant processing environment 200.
18 Citations
2 Claims
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1. A battery comprising:
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A. an interface including a power bus and a data bus; B. an integrated circuit including; i. a public bus connected with the data bus; ii. a public non-volatile memory connected with the public bus; iii. a public RAM connected with the public bus; iv. a private bus separate from the data bus; v. processor circuitry separately connected with the public bus and the private bus; vi. a private non-volatile memory connected only with the private bus; and vii. a private RAM connected only with the private bus; and C. in which the private non-volatile memory contains an unencrypted identity key, and in which the processor circuitry includes circuits to combine the unencrypted identity key with challenge data received over the public bus, and to send signed challenge data over the public bus. - View Dependent Claims (2)
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Specification