Reading configuration data from internal storage node of configuration storage circuit

• US 8,248,101 B2
• Filed: 09/08/2008
• Issued: 08/21/2012
• Est. Priority Date: 09/06/2007
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Voogel, Martin, Redgrave, Jason, Chandler, Trevis
• Primary Examiner(s): Crawford, Jason M
• Application Number:
  US12/283,130
• Publication Number:
  US 20090167345A1
• Time in Patent Office: 1,443 Days
• Field of Search: 326 37- 41, 326 46- 47
• US Class Current: 326/38
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G11C 7/1045 Read-write mode select circuits
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H03K 19/0008 Arrangements for reducing power consumption
• CPC Class Codes: H03K 19/17732 Macroblocks
• CPC Class Codes: H03K 19/17748 Structural details of configuration resources
• CPC Class Codes: H03K 19/17752 for hot reconfiguration
• CPC Class Codes: H03K 19/17768 for security
• CPC Class Codes: H03K 3/0372 of the master-slave type

Abstract

Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.

Claims

1. An integrated circuit (“

IC”

) comprising;

a) a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

b) a storage circuit for storing configuration data for the configurable circuit, said storage circuit comprising a plurality of internal storage nodes, each internal storage node maintaining one bit of the stored configuration data;

c) an interconnect circuit for controllably connecting the storage circuit to the configurable circuit to supply the stored configuration data, wherein the interconnect circuit is external to the storage circuit; and

d) a plurality of direct connections directly connecting the storage circuit'"'"'s internal storage nodes to the interconnect circuit, each direct connection directly contacting one internal storage node for providing the bit of the stored configuration data maintained by the internal storage node to the interconnect circuit without any intervening circuit that controls whether the bit of the stored configuration data reaches the interconnect circuit, wherein the direct connection is a part of a logical connection connecting the interconnect circuit with the storage circuit, the logical connection comprising two direct connections that are contacting two complementary internal storage nodes.

2. The IC of claim 1, wherein the interconnect circuit switchably provides to the configurable circuit different configuration data stored in different internal storage nodes by switchably connecting different internal storage nodes to the configurable circuit by using different direction connections.

3. The IC of claim 1, wherein the interconnect circuit switchably provides different configuration data to the configurable circuit at a particular periodic rate.

4. The IC of claim 1, wherein the storage circuit comprises a set of bit lines and a set of word lines, wherein a particular word line is for selecting a set of internal storage nodes, wherein a particular bit line is for writing a bit of data to a particular internal storage node selected by the particular word line.

5. The IC of claim 1, wherein the direct connection includes a buffer circuit.

6. The IC of claim 1,

wherein the internal storage node comprises a plurality of NMOS and PMOS transistors,

wherein a ratio of a size of the NMOS and PMOS transistors is selected to avoid corruption of the data stored in the internal storage node because of the contact by the direct connection to the interconnect circuit.

7. The IC of claim 1, wherein the interconnect circuit is a multiplexer controlled by a plurality of one-hot signals.

8. The IC of claim 1, wherein the storage circuit further comprises a port, wherein each bit of the port switchably provides access to a plurality of configuration data bits stored at different internal storage nodes.

9. An integrated circuit (“

IC”

) comprising;

a) a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

b) a plurality of storage circuits, each for storing configuration data for configuring the configurable circuit, each storage circuit comprising an internal storage node that maintains the stored configuration data;

c) an interconnect circuit for switchably providing to the configurable circuit different configuration data stored in different storage circuits; and

d) a plurality of direct connections, each directly contacting the internal storage node of one of the storage circuits to provide a bit of the stored configuration data maintained by the internal storage node to the interconnect circuit, wherein each direct connection provides only one bit of the stored configuration data by contacting only one internal storage node, wherein the interconnect circuit comprises (i) a logical output that is connected to the configurable circuit and (ii) a plurality of logical inputs connected to said plurality of direct connections, wherein a logical input is formed by two complementary bit lines, wherein each direct connection comprises two complementary bit lines that are connected to two complementary internal storage nodes.

10. The IC of claim 9, wherein the interconnect circuit switchably provides different configuration data to the configurable circuit at a particular periodic rate.

11. The IC of claim 9, wherein said direct connections supply the stored configuration data to the interconnect circuit without traversing any other controllable interconnect circuit.

12. The IC of claim 9, wherein none of the direct connections includes an intervening circuit that selectively prevents a configuration data bit stored in a particular internal storage node from reaching the interconnect circuit.

13. The IC of claim 9 further comprising a set of bit lines and a set of word lines, wherein a particular word line is for selecting a set of internal storage nodes, wherein a particular bit line is for writing a bit of data to a particular internal storage node selected by the particular word line.

14. The IC of claim 9, wherein each internal storage node comprises a plurality of NMOS and PMOS transistors, wherein a ratio of a size of the NMOS and PMOS transistors is selected to avoid corruption of the data stored in the internal storage node because of the contact by the direct connection to the interconnect circuit.

15. An electronic device comprising:

an integrated circuit (“

IC”

) comprising;

a) a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

b) a storage circuit for storing configuration data for the configurable circuit, said storage circuit comprising a plurality of internal storage nodes, each internal storage node maintaining one bit of the stored configuration data;

c) an interconnect circuit for controllably connecting the storage circuit to the configurable circuit to supply the stored configuration data, wherein the interconnect circuit is external to the storage circuit;

d) a plurality of direct connections directly connecting the storage circuit'"'"'s internal storage nodes to the interconnect circuit, each direct connection directly contacting one internal storage node for providing the bit of the stored configuration data maintained by the internal storage node to the interconnect circuit without any intervening circuit that controls whether the bit of the stored configuration data reaches the interconnect circuit, wherein the direct connection is a part of a logical connection connecting the interconnect circuit with the storage circuit, the logical connection comprising two direct connections that are contacting two complementary internal storage nodes; and

e) a memory device for providing the configuration data to the IC.

16. The electronic device of claim 15, wherein the memory device is a non-volatile memory storing the configuration data, wherein said configuration data is loaded into the storage circuit when the IC is powered up.

17. The electronic device of claim 15, wherein the interconnect circuit switchably provides to the configurable circuit different configuration data stored in different internal storage nodes byf switchably connecting different internal storage nodes to the configurable circuit at a particular periodic rate.