Semiconductor device including capacitor line parallel to source line

• US 8,248,551 B2
• Filed: 05/19/2011
• Issued: 08/21/2012
• Est. Priority Date: 03/28/1997
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ohtani, Hisashi, Ogata, Yasushi
• Primary Examiner(s): Qi, Mike
• Application Number:
  US13/111,344
• Publication Number:
  US 20110215327A1
• Time in Patent Office: 460 Days
• Field of Search: 349/44, 349/38, 349/39, 349/138, 349/139, 257/346, 257/72
• US Class Current: 349/44
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/78645 with multiple gate

Abstract

A first insulating thin film having a large dielectric constant such as a silicon nitride film is formed so as to cover a source line and a metal wiring that is in the same layer as the source line. A second insulating film that is high in flatness is formed on the first insulating film. An opening is formed in the second insulating film by etching the second insulating film, to selectively expose the first insulating film. A conductive film to serve as a light-interruptive film is formed on the second insulating film and in the opening, whereby an auxiliary capacitor of the pixel is formed between the conductive film and the metal wiring with first the insulating film serving as a dielectric. The effective aperture ratio can be increased by forming the auxiliary capacitor in a selected region where the influences of alignment disorder of liquid crystal molecules, i.e., disclination, are large.

Claims

1. A semiconductor device comprising:

a thin film transistor over a substrate and comprising a channel forming region, a source region and a drain region;

a first insulating film over the thin film transistor;

a source line over the first insulating film and electrically connected to the source region;

a gate line over the substrate, the gate line comprising a portion which extends in a direction perpendicular to the source line;

a drain electrode over the first insulating film and electrically connected to the drain region;

a second insulating film over the drain electrode;

a conductive film over the second insulating film, the conductive film extending in a direction parallel to the source line;

a third insulating film over the conductive film;

a pixel electrode over the third insulating film and electrically connected to the drain electrode; and

a capacitor comprising the drain electrode, the second insulating film and the conductive film,

wherein the conductive film comprises a first region and a second region,

wherein a width of the first region of the conductive film is larger than a width of the second region of the conductive film, and

wherein the first region of the conductive film overlaps with the channel forming region.

2. A semiconductor device comprising:

a first layer over a substrate, the first layer comprising a first channel forming region and a first source region;

a second layer over the substrate, the second layer comprising a second channel forming region and a second source region;

a first gate line over the substrate, wherein the first gate line and the first channel forming region overlap with each other;

a second gate line over the substrate, wherein the second gate line and the second channel forming region overlap with each other;

a first insulating film over the first layer, the second layer, the first gate line and the second gate line;

a source line over the first insulating film, the source line being electrically connected to the first source region and the second source region;

a second insulating film over the source line; and

a capacitor line over the second insulating film, the capacitor line overlapping with the first gate line, the second gate line, the first channel forming region and the second channel forming region.

3. The semiconductor device according to claim 2,

wherein a capacitor comprises at least part of the capacitor line.

4. The semiconductor device according to claim 3, further comprising a drain electrode electrically connected to the first layer,

wherein the capacitor further comprises at least part of the drain electrode.

5. The semiconductor device according to claim 2, further comprising a drain electrode electrically connected to the first layer,

wherein the drain electrode overlaps with the first channel forming region.

6. The semiconductor device according to claim 2, further comprising a gate insulating film between the first gate line and the first layer.

7. The semiconductor device according to claim 2, further comprising:

a gate insulating film on the first layer; and

a dielectric film over the gate insulating film,

wherein a capacitor comprises at least part of the dielectric film.

8. A semiconductor device comprising:

a first layer over a substrate, the first layer comprising a first channel forming region;

a second layer over the substrate, the second layer comprising a second channel forming region;

a first gate line over the substrate;

a second gate line over the substrate; and

a capacitor line crossing over the first gate line and the second gate line,

wherein the first channel forming region and the first gate line overlap with each other,

wherein the second channel forming region and the second gate line overlap with each other,

wherein the capacitor line overlaps with the first channel forming region, and

wherein the capacitor line overlaps with the second channel forming region.

9. The semiconductor device according to claim 8,

wherein a capacitor comprises at least part of the capacitor line.

10. The semiconductor device according to claim 9, further comprising a drain electrode electrically connected to the first layer,

wherein the capacitor further comprises at least part of the drain electrode.

11. The semiconductor device according to claim 8, further comprising a drain electrode electrically connected to the first layer,

wherein the drain electrode overlaps with the first channel forming region.

12. The semiconductor device according to claim 8, further comprising a gate insulating film between the first gate line and the first layer.

13. The semiconductor device according to claim 8, further comprising:

a gate insulating film on the first layer; and

a dielectric film over the gate insulating film,

wherein a capacitor comprises at least part of the dielectric film.

14. A semiconductor device comprising:

a first layer over a substrate, the first layer comprising a first channel forming region and a first source region;

a second layer over the substrate, the second layer comprising a second channel forming region and a second source region;

a first gate line over the substrate;

a second gate line over the substrate;

a source line over the substrate, the source line being electrically connected to the first source region and the second source region; and

a capacitor line over the substrate, the capacitor line extending in a direction parallel to the source line,

wherein the first channel forming region and the first gate line overlap with each other,

wherein the second channel forming region and the second gate line overlap with each other,

wherein the capacitor line comprises a first region, a second region and a third region between the first region and the second region,

wherein a width of the first region of the capacitor line is larger than a width of the third region of the capacitor line,

wherein a width of the second region of the capacitor line is larger than the width of the third region of the capacitor line,

wherein the first region of the capacitor line overlaps with the first channel forming region, and

wherein the second region of the capacitor line overlaps with the second channel forming region.

15. The semiconductor device according to claim 14,

wherein a capacitor comprises at least part of the capacitor line.

16. The semiconductor device according to claim 15, further comprising a drain electrode electrically connected to the first layer,

wherein the capacitor further comprises at least part of the drain electrode.

17. The semiconductor device according to claim 14, further comprising a drain electrode electrically connected to the first layer,

wherein the drain electrode overlaps with the first channel forming region.

18. The semiconductor device according to claim 14, further comprising a gate insulating film between the first gate line and the first layer.

19. The semiconductor device according to claim 14, further comprising:

a gate insulating film on the first layer; and

a dielectric film over the gate insulating film,

wherein a capacitor comprises at least part of the dielectric film.