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Multi-core SOC synchronization component

  • US 8,250,580 B2
  • Filed: 02/06/2009
  • Issued: 08/21/2012
  • Est. Priority Date: 10/24/2008
  • Status: Expired due to Fees
First Claim
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1. A synchronization component for a multi-core system-on-chip, comprising:

  • a key administration module storing, distributing and administrating keys, and supporting a data synchronization process when one of said keys is assigned to said data synchronization process;

    a thread schedule unit coupled to said key administration module and administrating a threading process when one of said keys is assigned to said threading process; and

    an expansion unit providing for expand a memory capacity of said key administration module and coupled to an external memory,wherein said key contains enable bits and type bits;

    said enable bits are used to verify whether said key is in use, said type bits are used to determine whether said key is distributed to said data synchronization process or said threading process.

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