Method for thinning a wafer
First Claim
1. A method for thinning a wafer, comprising:
- providing a wafer having a plurality of semiconductor chips, the wafer having a first side and a second side opposite the first side, wherein each of the chips includes a set of device structures, each of the device structures being substantially sealed by a liner layer and a barrier layer;
providing a wafer carrier, wherein the wafer carrier is attached to the second side of the wafer;
thinning the first side of the wafer to a predetermined thickness;
recessing the first side of the wafer to partially expose top portions of the liner layer, barrier layer, and the device structures;
depositing an isolation layer over the first side of the wafer and the top portions of the liner layer, barrier layer, and the device structures;
depositing an insulation layer over the isolation layer;
planarizing the insulation layer to expose top portions of the device structures for electrical connection; and
depositing a dielectric layer over the planarized first side of the wafer.
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Accused Products
Abstract
A method for thinning a wafer is provided. In one embodiment, a wafer is provided having a plurality of semiconductor chips, the wafer having a first side and a second side opposite the first side, wherein each of the chips includes a set of through silicon vias (TSVs), each of the TSVs substantially sealed by a liner layer and a barrier layer. A wafer carrier is provided for attaching to the second side of the wafer. The first side of the wafer is thinned and thereafer recessed to partially expose portions of the liner layers, barrier layers and the TSVs protruding from the wafer. An isolation layer is deposited over the first side of the wafer and the top portions of the liner layers, barrier layers and the TSVs. Thereafter, an insulation layer is deposited over the isolation layer. The insulation layer is then planarized to expose top portions of the TSVs. A dielectric layer is deposited over the planarized first side of the wafer. One or more electrical contacts are formed in the dielectric layer for electrical connection to the exposed one or more TSVs.
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Citations
27 Claims
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1. A method for thinning a wafer, comprising:
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providing a wafer having a plurality of semiconductor chips, the wafer having a first side and a second side opposite the first side, wherein each of the chips includes a set of device structures, each of the device structures being substantially sealed by a liner layer and a barrier layer; providing a wafer carrier, wherein the wafer carrier is attached to the second side of the wafer; thinning the first side of the wafer to a predetermined thickness; recessing the first side of the wafer to partially expose top portions of the liner layer, barrier layer, and the device structures; depositing an isolation layer over the first side of the wafer and the top portions of the liner layer, barrier layer, and the device structures; depositing an insulation layer over the isolation layer; planarizing the insulation layer to expose top portions of the device structures for electrical connection; and depositing a dielectric layer over the planarized first side of the wafer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for thinning a wafer, comprising:
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providing a wafer having a plurality of semiconductor chips, the wafer having a first side and a second side opposite the first side, wherein each of the chips includes a set of through silicon vias (TSVs), each of the TSVs being substantially sealed by a liner layer and a barrier layer; providing a wafer carrier, wherein the wafer carrier is attached to the second side of the wafer; thinning the first side of the wafer to a predetermined thickness; recessing the first side of the wafer to partially expose portions of the liner layer, barrier layer, and the TSVs, the liner layers, the barrier layers and the TSVs protruding from the wafer; depositing an isolation layer over the first side of the wafer and the top portions of the liner layer, barrier layer, and the TSVs; depositing an insulation layer over the isolation layer; planarizing the insulation layer to expose top portions of the TSVs; depositing a dielectric layer over the planarized first side of the wafer; and forming one or more electrical contacts for electrical connection to the exposed one or more TSVs. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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21. A method for thinning a wafer having a plurality of semiconductor chips therein, the method comprising:
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forming a set of through silicon vias (TSVs) in each of the plurality of semiconductor chips; depositing a dielectric liner layer over the set of TSVs; forming a barrier layer over the dielectric liner layer; thinning the wafer to expose top portions of at least one of the liner layer, barrier layer, or the device structures; depositing an isolation layer over the exposed top portions of the at least one of the liner layer, barrier layer, or the device structures; depositing an insulation layer over the isolation layer; planarizing the insulation layer to expose the device structures; depositing a dielectric layer over the planarized insulation layer; and forming at least one redistribution layer in the dielectric layer. - View Dependent Claims (22, 23, 24, 25, 26, 27)
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Specification