Semiconductor device and manufacturing method of the same

• US 8,253,179 B2
• Filed: 04/25/2006
• Issued: 08/28/2012
• Est. Priority Date: 05/13/2005
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sakakura, Masayuki, Yamazaki, Shunpei
• Primary Examiner(s): Coleman, William D
• Assistant Examiner(s): KIM, SU C
• Application Number:
  US11/410,034
• Publication Number:
  US 20060255345A1
• Time in Patent Office: 2,317 Days
• Field of Search: 257/223, 257/227, 257/291, 257/292, 257/359, 257/439, 257/443, 257/655, 257/E21.094, 257/E21.104, 257/E21.121, 257/E21.372, 257/E21.411, 257/E27.1, 438/149, 438/FOR.183, 438/FOR.184, 438/FOR.200, 438/FOR.201
• US Class Current: 257/292
• CPC Class Codes: G02F 1/133302 Rigid substrates, e.g. inorganic substrates
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/0235 Field-sequential colour display
• CPC Class Codes: G09G 3/2007 Display of intermediate tones
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1244 for preventing breakage, peeling or short circuiting
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 27/1274 using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
• CPC Class Codes: H01L 29/78663 Amorphous silicon transistors
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 2924/13069 : Thin film transistor [TFT]
• CPC Class Codes: H10K 59/1201 : Manufacture or treatment
• CPC Class Codes: H10K 59/1213 : the pixel elements being TFTs
• CPC Class Codes: H10K 59/131 : Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/88 : Dummy elements, i.e. elements having non-functional features

Abstract

An insulating film provided between adjacent pixels is referred to as a bank, a partition, a barrier, an embankment or the like, and is provided above a source wiring or a drain wiring for a thin film transistor, or a power supply line. In particular, at an intersection portion of these wirings provided in different layers, a larger step is formed there than in other portions. Even in a case that the insulating film provided between adjacent pixels is formed by a coating method, there is a problem that thin portions are partially formed due to this step and the withstand pressure is reduced. In the present invention, a dummy material is arranged near the large step portion, particularly, around the intersection portion of wirings, so as to alleviate unevenness formed thereover. The upper wring and the lower wiring are arranged in a misaligned manner so as not to align the end portions.

Claims

1. A semiconductor device comprising:

a pixel, the pixel comprising;

a first wiring, a second wiring and a metal layer over an insulating surface;

a first insulating layer covering the first wiring, the second wiring and the metal layer;

a second insulating layer covering the first insulating layer,

a first electrode over the second insulating layer, wherein the first electrode is in contact with the second wiring through the first insulating layer and the second insulating layer;

a second electrode formed over the second insulating layer; and

a third insulating layer over the first electrode, the first insulating layer, the first wiring, the second wiring, the metal layer and the second insulating layer,

wherein the first wiring, the second wiring and the metal layer contain a same material,

wherein the first electrode is provided between the metal layer and the first wiring,

wherein the metal layer is provided between the first electrode and the second electrode, and

wherein the metal layer is electrically insulated from other wirings.

2. A semiconductor device according to claim 1, wherein a peripheral portion of the second electrode is covered by the third insulating layer.

6. A semiconductor device according to any one of claims 1 and 3, further comprising a thin film transistor including the first wiring as a gate electrode.

7. A semiconductor device according to any one of claims 1 and 3, further comprising a first thin film transistor including the first wiring as a gate electrode, and a second thin film transistor including the second wiring as a gate electrode.

12. A semiconductor device according to any one of claims 1, 3 and 8, wherein the metal layer has an L-like shape.

14. A semiconductor device according to any one of claims 1, 3 and 8, wherein the semiconductor device is at least one selected from the group consisting of a portable information terminal, a video camera, a digital camera, a laptop computer, an image reproducing device, and a cellular phone.

3. A semiconductor device comprising:

a pixel, the pixel comprising;

a first wiring, a second wiring and a metal layer over an insulating surface;

a first insulating layer covering the first wiring, the second wiring and the metal layer;

a second insulating layer covering the first insulating layer;

a first electrode over the second insulating layer, wherein the first electrode is in contact with the second wiring through the first insulating layer and the second insulating layer;

a second electrode formed over the second insulating layer;

a third insulating layer over the first electrode, the first insulating layer, the first wiring, the second wiring, the metal layer and the second insulating layer; and

a light emitting element containing the second electrode over the second insulating layer, a light-emitting layer over the second electrode, and a third electrode over the light-emitting layer,

wherein the metal layer is provided between the first electrode and the second electrode, and

wherein the metal layer is electrically insulated from other wirings.

4. A semiconductor device according to claim 3, wherein a peripheral portion of the second electrode is covered by the third insulating layer.

8. A semiconductor device according to any one of claims 3 and 5, wherein the light-emitting layer contains at least one of an organic compound and an inorganic compound.

9. A semiconductor device according to claim 8, wherein the second electrode, the light-emitting layer and the third electrode form a light-emitting element.

10. A semiconductor device according to claim 8, wherein the third insulating layer is a partition covering a peripheral portion of the second electrode.

11. A semiconductor device according to claim 8, further comprising a first thin film transistor including the first wiring as a gate electrode, and a second thin film transistor including the second wiring as a gate electrode.

13. A semiconductor device according to any one of claims 4, 10 and 2, wherein the third insulating layer includes a solvent, and is formed using a material whose viscosity is from 10 cp to 60 cp by a coating method.

5. A semiconductor device comprising:

a pixel, the pixel comprising;

a first wiring, a second wiring and a metal layer over an insulating surface;

a first insulating layer covering the first wiring, the second wiring, and the metal layer;

a second insulating layer covering the first insulating layer;

a first electrode over the second insulating layer, wherein the first electrode is in contact with the second wiring through the first insulating layer and the second insulating layer;

a third insulating layer over the first electrode the first insulating layer, the first wiring, the second wiring, the metal layer and the second insulating layer;

a second electrode over the second insulating layer;

a light-emitting layer over the second electrode; and

a third electrode over the light-emitting layer,

wherein the second wiring, the first wiring, and the metal layer contain a same material,

wherein the first electrode is provided between the metal layer and the first wiring, and

wherein the metal layer is electrically insulated from other wirings.

15. A semiconductor device comprising:

a pixel, the pixel comprising;

a first wiring over an insulating surface;

a first insulating layer covering the first wiring;

a metal layer over the first insulating layer;

a second wiring over the first insulating layer;

a first electrode over the first insulating layer; and

a second insulating layer over the first wiring, the metal layer and the first electrode,

wherein the first wiring and the second wiring have an intersection portion,

wherein the metal layer is provided between the intersection portion and the first electrode, and

wherein the metal layer is electrically insulated from other wirings.

16. A semiconductor device according to claim 15, wherein a peripheral portion of the first electrode is covered by the second insulating layer.

17. A semiconductor device according to claim 15, further comprising:

a light emitting element containing the first electrode over the first insulating layer, a light-emitting layer over the first electrode, and a second electrode over the light-emitting layer.

18. A semiconductor device comprising:

a pixel, the pixel comprising;

a first wiring over an insulating surface;

a first insulating layer covering the first wiring;

a second wiring over the first insulating layer; and

a plurality of metal layers over the first insulating layer overlapping the first wiring,

wherein the first wiring and the second wiring have an intersection portion,

wherein the plurality of metal layers is adjacent to the intersection portion,

wherein each of the plurality of metal layers is adjacent to each other, and

wherein each of the plurality of metal layers is electrically insulated from other wirings.

19. A semiconductor device comprising:

a pixel, the pixel comprising;

a first wiring over an insulating surface;

a first insulating layer over the first wiring;

a second wiring over the first insulating layer;

a metal layer over the first insulating layer;

a first electrode over the first insulating layer; and

a second insulating layer over the second wiring,

wherein the first wiring and the second wiring have an intersection portion,

wherein the metal layer is provided between the intersection portion and the first electrode, and

wherein the metal layer is electrically insulated from other wirings.

20. A semiconductor device according to claim 19, wherein a peripheral portion of the first electrode is covered by the second insulating layer.

21. A semiconductor device according to claim 19, wherein the first insulating layer maybe stack of multiple insulating layers.

22. A semiconductor device according to claim 19, further comprising:

a light emitting element containing the first electrode over the first insulating layer, a light-emitting layer over the first electrode, and a second electrode over the light-emitting layer.

23. A semiconductor device comprising:

a pixel, the pixel comprising;

a gate wiring;

a thin film transistor including a gate electrode electrically connected to the gate wiring;

a pixel electrode operationally connected to the thin film transistor;

a metal layer; and

an insulating layer formed over at least the gate wiring, the metal layer and a peripheral portion of the pixel electrode,

wherein the pixel electrode does not overlap with the metal layer, and

wherein the metal layer is electrically floating.

24. A semiconductor device according to claim 23, wherein the gate wiring and the metal layer are formed by patterning a same layer.

25. A semiconductor device according to claim 23, further comprising a light emitting layer comprising an organic compound.