Semiconductor sensor structures with reduced dislocation defect densities

• US 8,253,211 B2
• Filed: 09/24/2009
• Issued: 08/28/2012
• Est. Priority Date: 09/24/2008
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Cheng, Zhiyuan, Fiorenza, James G., Sheen, Calvin, Lochtefeld, Anthony
• Primary Examiner(s): Sefer, A.
• Assistant Examiner(s): YUSHIN, NIKOLAY K
• Application Number:
  US12/565,863
• Publication Number:
  US 20100078680A1
• Time in Patent Office: 1,069 Days
• Field of Search: 257/292, 257/184, 257/E31.079, 257/E31.002, 257/E21.09, 257/414, 257/428, 257/431
• US Class Current: 257/431
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02521 Materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/02647 Lateral overgrowth
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264
• CPC Class Codes: H01L 27/1446 in a repetitive configuration
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 31/0304 including, apart from doping materials or other impurities, only AIIIBV compounds
• CPC Class Codes: H01L 31/03046 including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP
• CPC Class Codes: H01L 31/0312 including, apart from doping materials or other impurities, only AIVBIV compounds, e.g. SiC
• CPC Class Codes: H01L 31/103 the potential barrier being of the PN homojunction type
• CPC Class Codes: H01L 31/1037 the devices comprising active layers formed only by AIVBVI compounds
• CPC Class Codes: H01L 31/105 the potential barrier being of the PIN type
• CPC Class Codes: Y02E 10/544 Solar cells from Group III-V materials
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.

Claims

1. A sensor, comprising:

a substrate configured with at least one depression in the substrate;

an insulator in the at least one depression in the substrate and configured to form at least two openings to the substrate, the insulator overlying sides of the at least one depression to form the at least two openings;

a first epitaxial crystalline structure in at least a portion of a first of the at least two openings;

a second epitaxial crystalline structure in at least a portion of a second of the at least two openings, the first and second epitaxial crystalline structures interfacing at a coalesced portion over the insulator;

a sensing region formed at or in the coalesced portion to output electrons generated by light absorption therein; and

contacts coupled to receive the electrons to obtain an output electric signal.

2. The sensor of claim 1, wherein the first or the second epitaxial crystalline structure is substantially free from dislocation defects.

3. The sensor of claim 1, wherein the first or the second epitaxial crystalline structures is comprised of a semiconductor material.

4. The sensor of claim 1, wherein at least two openings include trenches formed in a crystalline substrate.

5. The sensor of claim 1, wherein the sensing region comprises a p-n junction or a p-i-n structure.

6. The sensor of claim 1, wherein the sensor is a photodetector pixel of a semiconductor device;

the photodetector pixel is a complementary-metal-oxide-semiconductor photodetector; and

the photodetector comprises a p-n junction or a p-i-n structure and a metal-oxide-semiconductor transistor, wherein the p-n junction or a p-i-n structure is formed in the sensing region, and wherein the photodetector is an IR or UV detector.

7. The sensor of claim 1, wherein the coalesced portion has a width of 1 micron or larger.

8. The sensor of claim 1, comprising:

a p-i-n structure formed within the substrate; and

an intrinsic region of the p-i-n structure is positioned to receive light in the sensing region.

9. The sensor of claim 1, wherein the first and second epitaxial crystalline structures comprise semiconductor materials among a group II-VI compound, a group III-V compound, group III-N compound or ternary and quaternary compounds thereof or a group IV material.

10. The sensor of claim 1, wherein each of the first and second epitaxial crystalline structures are lattice mismatched to the substrate.

11. The sensor of claim 10, wherein an aspect ratio of at least one of the at least two openings is 0.5 or greater, wherein each of the openings is a trench, recess or hole.

12. The sensor of claim 10, wherein each of said first and second epitaxial crystalline structures comprise an epitaxial lateral overgrowth (ELO) region, wherein said ELO region is at least 2 times a width of the opening.

13. A semiconductor sensor, comprising:

a crystalline substrate having a recessed portion from a top surface of the crystalline substrate;

an insulator in the recessed portion of the crystalline substrate, the insulator having a plurality of openings to the crystalline substrate in the recessed portion;

a first crystalline material within the openings in the insulator, the first crystalline material being lattice-mismatched with the substrate;

a second different buffer crystalline material being lattice-mismatched with the crystalline substrate between the crystalline substrate and the first crystalline material;

a light-sensing device in a least a portion of the first crystalline material to output electrons generated by light absorption therein; and

contacts coupled to receive the electrons generated by light absorption to obtain an output electric signal.

14. The sensor of claim 13, wherein the second different buffer crystalline material has a thickness over the substrate less than 100 nm.

15. The sensor of claim 13, wherein the first crystalline material comprises a group II-VI compound or ternary and quaternary compounds thereof, a group III-V compound or ternary and quaternary compounds thereof, group III-N compound or ternary and quaternary compounds thereof or a group IV material.