Printed circuit board, display apparatus having a printed circuit board and method of manufacturing the printed circuit board

• US 8,254,136 B2
• Filed: 09/04/2008
• Issued: 08/28/2012
• Est. Priority Date: 09/11/2007
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Kwan-Ho, Myeong, Ji-Man, Jang, Ick-Kyu
• Primary Examiner(s): Datskovskiy, Michail V
• Application Number:
  US12/204,015
• Publication Number:
  US 20090066624A1
• Time in Patent Office: 1,454 Days
• Field of Search: 361748-752, 361760-767, 361777-779, 361792-795, 361/816, 361/818, 361/805, 361/780, 174250-267, 257/624, 257635-637, 257/700, 257/702, 257/728, 257784-786, 257/698, 257/774, 257/758, 257662-667, 345/77, 345/164.4, 345200-205, 345/211, 345/214, 345/90, 345/92, 345 55- 58, 345/80, 345/99, 333/12, 333/24.R, 333/32, 333/33, 333/99.R, 333/243, 333/246, 333/247, 333/125, 333/175, 333/185, 29825-852, 438618-622, 438/613, 438/614
• US Class Current: 361/748
• CPC Class Codes: G09G 2330/06 Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers
• CPC Class Codes: H05K 1/0218 by printed shielding conductors, ground planes or power plane H05K1/0236 takes precedence
• CPC Class Codes: H05K 1/0219 Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
• CPC Class Codes: H05K 1/0237 High frequency adaptations H05K1/0216 takes precedence
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 2201/0715 provided by an outer layer of PCB
• CPC Class Codes: H05K 2201/09236 Parallel layout layout of balanced signal pairs H05K1/0245; superposed layout H05K2201/09672
• CPC Class Codes: H05K 2201/09336 Signal conductors in same plane as power plane
• CPC Class Codes: H05K 2201/09672 Superposed layout, i.e. in different planes parallel traces in one plane H05K2201/09236
• CPC Class Codes: Y10T 29/49124 On flat or curved insulated base, e.g., printed circuit, etc.
• CPC Class Codes: Y10T 29/49126 Assembling bases
• CPC Class Codes: Y10T 29/49144 by metal fusion
• CPC Class Codes: Y10T 29/49156 with selective destruction of conductive paths

Abstract

A printed circuit board (“PCB”) includes a first pattern structure, a second pattern structure, a third pattern structure, and a fourth pattern structure. The first pattern structure includes a first ground pattern. The second pattern structure includes a first line pattern overlapping the first ground pattern and a second ground pattern electrically insulated from the first line pattern. The third pattern structure includes a third ground pattern overlapping the first line pattern and a second line pattern overlapping the second ground pattern. The fourth pattern structure includes a fourth ground pattern overlapping the second line pattern. Therefore, the PCB may decrease noise.

Claims

1. A printed circuit board, comprising:

a first pattern structure including a first ground pattern;

a second pattern structure formed on the first pattern structure, the second pattern structure including;

a first line pattern; and

a second ground pattern electrically insulated from the first line pattern;

a third pattern structure formed on the second pattern structure, the third pattern structure including;

a third ground pattern; and

a second line pattern electrically insulated from the third ground pattern; and

a fourth pattern structure formed on the third pattern structure, the fourth pattern structure including a fourth ground pattern,

wherein the first line pattern is disposed between the first ground pattern and the third ground pattern, and the second line pattern is disposed between the second ground pattern and the fourth ground pattern.

2. The printed circuit board of claim 1, further comprising:

a first insulation layer disposed between the first pattern structure and the second pattern structure;

a second insulation layer disposed between the second pattern structure and the third pattern structure; and

a third insulation layer disposed between the third pattern structure and the fourth pattern structure.

3. The printed circuit board of claim 2, further comprising a controller electrically connected to the first line pattern and the second line pattern, wherein the controller receives a first differential signal from the first line pattern and applies a second differential signal to the second line pattern.

4. The printed circuit board of claim 3, wherein a frequency of the first differential signal is substantially same as a frequency of the second differential signal.

5. The printed circuit board of claim 4, wherein the first differential signal comprises a low voltage differential signal and the second differential signal comprises a reduced swing differential signal.

6. The printed circuit board of claim 3, further comprising a gamma voltage generator controlled by the controller to generate a gamma reference voltage.

7. The printed circuit board of claim 6, wherein the fourth pattern structure further comprises a third line pattern electrically insulated from the fourth ground pattern, and the third line pattern transfers the gamma reference voltage generated by the gamma voltage generator.

8. The printed circuit board of claim 7, wherein the third line pattern is separated from the second line pattern.

9. The printed circuit board of claim 8, wherein the second line pattern is extended substantially in one direction.

10. The printed circuit board of claim 7, wherein the third line pattern does not overlap with the second line pattern.

11. A display apparatus, comprising:

a display panel displaying an image; and

a printed circuit board including;

a first pattern structure including a first ground pattern;

a second pattern structure formed on the first pattern structure, the second pattern structure including a first line pattern and a second ground pattern electrically insulated from the first line pattern;

a third pattern structure formed on the second pattern structure, the third pattern structure including a third ground pattern and a second line pattern electrically insulated from the third ground pattern; and

a fourth pattern structure formed on the third pattern structure, the fourth pattern structure including a fourth ground pattern,

wherein the first line pattern is disposed between the first ground pattern and the third ground pattern, and the second line pattern is disposed between the second ground pattern and the fourth ground pattern.

12. The display apparatus of claim 11, wherein the printed circuit board further comprises:

a first insulation layer disposed between the first pattern structure and the second pattern structure;

a second insulation layer disposed between the second pattern structure and the third pattern structure; and

a third insulation layer disposed between the third pattern structure and the fourth pattern structure.

13. The display apparatus of claim 12, wherein the printed circuit board further comprises:

a controller electrically connected to the first line pattern and the second line pattern; and

a gamma voltage generator controlled by the controller to generate a gamma reference voltage,

wherein the controller receives the first differential signal from the first line pattern and applies the second differential signal to the second line pattern.

14. The display apparatus of claim 13, wherein the fourth pattern structure further comprises a third line pattern electrically insulated from the fourth ground pattern, and the third line pattern transfers the gamma reference voltage generated by the gamma voltage generator.

15. The display apparatus of claim 14, wherein the third line pattern is separated from the second line pattern.

16. The display apparatus of claim 14, wherein the third line pattern does not overlap with the second line pattern.