Protecting semiconducting oxides

• US 8,258,021 B2
• Filed: 10/26/2007
• Issued: 09/04/2012
• Est. Priority Date: 10/26/2007
• Status: Active Grant

• Current Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Original Assignee: Palo Alto Research Center, Inc. (Xerox Holdings Corp.)
• Inventors: Ng, Tse Nga, Chabinyc, Michael L.
• Primary Examiner(s): MENZ, DOUGLAS M
• Application Number:
  US11/924,678
• Publication Number:
  US 20090108304A1
• Time in Patent Office: 1,775 Days
• Field of Search: 257/288, 257/59, 438/149
• US Class Current: 438/149
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

In transistor structures such as thin film transistors (TFTs) in an array of cells, a layer of semiconducting oxide material that includes a channel is protected by a protective layer that includes low-temperature encapsulant material. The semiconducting oxide material can be a transition metal oxide material such as zinc oxide, and can be in an active layered substructure that also includes channel end electrodes. The low-temperature encapsulant can, for example, be an organic polymer such as poly(methyl methacrylate) or parylene, deposited on an exposed region of the oxide layer such as by spinning, spin-casting, evaporation, or vacuum deposition or an inorganic polymer deposited such as by spinning or liquid deposition. The protective layer can include a lower sublayer of low-temperature encapsulant on the exposed region and an upper sublayer of inorganic material on the lower sublayer. For roll-to-roll processing, a mechanically flexible, low-temperature substrate can be used.

Claims

1. A method comprising:

producing a transistor structure that includes a gate electrode, a gate dielectric layer over the gate electrode, and a layered structure over the gate dielectric layer, the layered structure including a patterned layer of semiconducting oxide material in which a channel is defined, the act of producing a transistor structure comprising;

producing a protective layer over the layer of semiconducting oxide material, the protective layer including low-temperature encapsulant and being structured to protect the semiconducting oxide material, wherein producing the protective layer comprises;

depositing low-temperature organic encapsulant on an exposed region of the layer of semiconducting oxide material; and

depositing low temperature inorganic encapsulant on the low-temperature organic encapsulant.

2. The method of claim 1 in which the act of producing the transistor structure comprises, before the act of producing the protective layer:

producing the gate electrode on a substrate;

depositing the gate dielectric layer on the gate electrode; and

producing the layered structure on the gate dielectric layer;

the act of producing the layered structure comprising;

depositing the layer of semiconducting oxide material on the gate dielectric.

3. The method of claim 1 in which the act of producing the protective layer comprises at least one of:

spin depositing or spin-casting organic polymer;

evaporating organic polymer; and

vacuum depositing organic polymer;

and at least one of;

spin depositing inorganic polymer; and

depositing inorganic polymer as a liquid.

4. The method of claim 1, further comprising:

forming a via through the protective layer; and

disposing an additional electrode layer over the protecting layer; and

electrically connecting the additional electrode layer to one of the source and drain electrodes.

5. The method of claim 1, wherein:

depositing the low-temperature organic encapsulant on the exposed region of the layer of semiconducting oxide material comprises depositing at least one of poly(methyl methacrylate), parylene, polystyrene, epoxy SU-8, polyvinyl phenol; and

depositing the inorganic encapsulant on the low-temperature organic encapsulant comprises depositing at least one of poly(methylsilsesquioxane), and siloxane.