DC-DC conversion for a power amplifier using the RF input
First Claim
Patent Images
1. A power amplifier system, comprising:
- a power amplifier configured to receive an RF input;
a DC-DC converter coupled to the power amplifier; and
clocking circuits that drives the DC-DC converter, the clocking circuits using the RF input to generate a clock, the clock acting with the DC-DC converter to provide an output voltage used in the power amplifier, wherein divider ratios are changed to change a frequency of the clock to minimize interference.
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Abstract
A power amplifier system is provided that includes a power amplifier configured to receive an RF input. A DC-DC converter is coupled to the power amplifier. Clocking circuits drive the DC-DC converter. The clocking circuits use the RF input to generate a clock. The clock acts with the DC-DC converter to provide an output voltage used in the power amplifier.
61 Citations
28 Claims
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1. A power amplifier system, comprising:
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a power amplifier configured to receive an RF input; a DC-DC converter coupled to the power amplifier; and clocking circuits that drives the DC-DC converter, the clocking circuits using the RF input to generate a clock, the clock acting with the DC-DC converter to provide an output voltage used in the power amplifier, wherein divider ratios are changed to change a frequency of the clock to minimize interference. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 25, 26, 27, 28)
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2. A power amplifier system, comprising:
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a power amplifier configured to receive an RF input; a DC-DC converter coupled to the power amplifier; and clocking circuits that drives the DC-DC converter, the clocking circuits using the RF input to generate a clock, the clock being generated from an RF signal present at an intermediate node or an output of the power amplifier, wherein the clock is between high and low bands of the power amplifier to minimize the clock interference of the high and low bands.
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23. A power amplifier system, comprising:
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a power amplifier configured to receive an RF input; a DC-DC converter coupled to the power amplifier; and clocking circuits that drives the DC-DC converter, the clocking circuits using the RF input to generate a clock, the clock being generated from an RF signal present at an intermediate node or an output of the power amplifier, wherein divider ratios are changed to change a frequency of the clock to minimize interference.
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24. A power amplifier system, comprising:
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a power amplifier configured to receive an RF input; a DC-DC converter coupled to the power amplifier; and clocking circuits that drives the DC-DC converter, the clocking circuits using the RF input to generate a clock, the clock acting with the DC-DC converter to provide an output voltage used in the power amplifier, wherein the clock is between high and low bands of the power amplifier to minimize the clock interference of the high and low bands.
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Specification