Programming schemes for multi-level analog memory cells
First Claim
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1. A method for data storage, comprising:
- predefining a continuous-programming storage strategy and a discontinuous-programming storage strategy for storage of data in multi-bit analog memory cells;
storing first data bits in a set of the multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels;
storing second data bits in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits;
estimating a time difference that elapsed between the first time and the second time; and
selecting a storage strategy, by choosing the continuous-programming storage strategy when the time difference is below a predefined time threshold and choosing the discontinuous-programming storage strategy when the time difference is above the predefined time threshold, wherein the selected storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.
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Abstract
A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.
583 Citations
33 Claims
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1. A method for data storage, comprising:
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predefining a continuous-programming storage strategy and a discontinuous-programming storage strategy for storage of data in multi-bit analog memory cells; storing first data bits in a set of the multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels; storing second data bits in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits; estimating a time difference that elapsed between the first time and the second time; and selecting a storage strategy, by choosing the continuous-programming storage strategy when the time difference is below a predefined time threshold and choosing the discontinuous-programming storage strategy when the time difference is above the predefined time threshold, wherein the selected storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. Apparatus for data storage, comprising:
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programming circuitry, which is coupled to store first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels, and to store second data bits in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits; and a processor, which is configured to predefine a continuous-programming storage strategy and a discontinuous-programming storage strategy, to estimate a time difference that elapsed between the first time and the second time, and to select a storage strategy, by choosing the continuous-programming storage strategy when the time difference is below a predefined time threshold and choosing the discontinuous-programming storage strategy when the time difference is above the predefined time threshold, wherein the selected storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32)
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33. Apparatus for data storage, comprising:
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a memory comprising a set of multi-bit analog memory cells; programming circuitry, which is coupled to store first data bits in the set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels, and to store second data bits in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits; and a processor, which is configured to predefine a continuous-programming storage strategy and a discontinuous-programming storage strategy, to estimate a time difference that elapsed between the first time and the second time, and to select a storage strategy, by choosing the continuous-programming storage strategy when the time difference is below a predefined time threshold and choosing the discontinuous-programming storage strategy when the time difference is above the predefined time threshold, wherein the selected storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.
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Specification