Process scheduling optimization method
First Claim
1. A computer software product that includes a non-transitory storage medium readable by a processor, the non-transitory storage medium having stored thereon a set of instructions for performing design and process monitoring optimization, the instructions comprising:
- (a) a first set of instructions which, when loaded into main memory and executed by the processor, causes the processor to build a critical path method schedule of a project;
(b) a second set of instructions which, when loaded into main memory and executed by the processor, causes the processor to map, during a planning stage of said project, pattern sets of cut-off dates of said project to said critical path method schedule;
(c) a third set of instructions which, when loaded into main memory and executed by the processor, causes the processor to identify, during said planning stage, project cut-off date weeks corresponding to the pattern sets of the project cut-off dates;
(d) a fourth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to input a portion of said pattern sets and the corresponding project cut-off date weeks into a neural network to train the neural network to perform pattern recognition in classifying work planned at specified cut-off dates;
(e) a fifth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to use the remaining pattern sets to test the neural network pattern recognition after it has been trained;
(f) a sixth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to monitor the project, during the construction stage of said project, at said same cut-off dates;
(g) a seventh set of instructions which, when loaded into main memory and executed by the processor, causes the processor to prepare, at any desired cut-off date, a corresponding descriptive pattern, said corresponding descriptive pattern describing actual work accomplishments during a time period defined by said any desired cut-off date;
(h) an eighth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to input said descriptive pattern to said neural network which, responsively, declares a week of convergence that said descriptive pattern input tends to converge; and
(i) a ninth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to compare said week of convergence declared by said neural network pattern recognition to said cut-off date week of said associated cut-off date pattern set thereby indicating whether actual progress of the project is on schedule, ahead of schedule, or behind schedule.
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Abstract
The design and process scheduling optimization method is a technique that circumvents problems encountered in previous optimization techniques. The method performs comparison against multiple possible outcomes rather than a single-valued benchmark. Pattern Recognition (PR) techniques are utilized to classify the work planned at specified cut-off dates during the planning stage. Classification is used to monitor and evaluate the progress during the construction stage. The PR technique generalizes a virtual benchmark to represent the whole project based on multiple possible outcomes generated at a given cut-off date. The generalization feature offers a potential tool to overcome the problem of variation in the quality of data collected. Patterns are constructed to encode work of the project at different cut-off dates. The present invention utilizes a robust pattern recognition method applied to Critical Path Method (CPM) procedures to monitor and evaluate progress of construction projects.
33 Citations
8 Claims
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1. A computer software product that includes a non-transitory storage medium readable by a processor, the non-transitory storage medium having stored thereon a set of instructions for performing design and process monitoring optimization, the instructions comprising:
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(a) a first set of instructions which, when loaded into main memory and executed by the processor, causes the processor to build a critical path method schedule of a project; (b) a second set of instructions which, when loaded into main memory and executed by the processor, causes the processor to map, during a planning stage of said project, pattern sets of cut-off dates of said project to said critical path method schedule; (c) a third set of instructions which, when loaded into main memory and executed by the processor, causes the processor to identify, during said planning stage, project cut-off date weeks corresponding to the pattern sets of the project cut-off dates; (d) a fourth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to input a portion of said pattern sets and the corresponding project cut-off date weeks into a neural network to train the neural network to perform pattern recognition in classifying work planned at specified cut-off dates; (e) a fifth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to use the remaining pattern sets to test the neural network pattern recognition after it has been trained; (f) a sixth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to monitor the project, during the construction stage of said project, at said same cut-off dates; (g) a seventh set of instructions which, when loaded into main memory and executed by the processor, causes the processor to prepare, at any desired cut-off date, a corresponding descriptive pattern, said corresponding descriptive pattern describing actual work accomplishments during a time period defined by said any desired cut-off date; (h) an eighth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to input said descriptive pattern to said neural network which, responsively, declares a week of convergence that said descriptive pattern input tends to converge; and (i) a ninth set of instructions which, when loaded into main memory and executed by the processor, causes the processor to compare said week of convergence declared by said neural network pattern recognition to said cut-off date week of said associated cut-off date pattern set thereby indicating whether actual progress of the project is on schedule, ahead of schedule, or behind schedule. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification